54.5.7 AES Key Word Register x
This register can only be written if the WPEN bit is cleared in the AES Write Protection Mode Register.
These registers are write-only to prevent the key from being read by another application.
Note: AES_KEYWRx
registers are not used if the Private Key internal registers are selected
(AES_EMR.PKRS=1).
| Name: | AES_KEYWRx |
| Offset: | 0x20 + x*0x04 [x=0..7] |
| Reset: | – |
| Property: | Write-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| KEYW[31:24] | |||||||||
| Access | W | W | W | W | W | W | W | W | |
| Reset | – | – | – | – | – | – | – | – | |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| KEYW[23:16] | |||||||||
| Access | W | W | W | W | W | W | W | W | |
| Reset | – | – | – | – | – | – | – | – | |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| KEYW[15:8] | |||||||||
| Access | W | W | W | W | W | W | W | W | |
| Reset | – | – | – | – | – | – | – | – | |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| KEYW[7:0] | |||||||||
| Access | W | W | W | W | W | W | W | W | |
| Reset | – | – | – | – | – | – | – | – | |
Bits 31:0 – KEYW[31:0] Key Word
The four/six/eight 32-bit Key Word registers set the 128-bit/192-bit/256-bit cryptographic key used for AES encryption/decryption.
AES_KEYWR0 corresponds to the first word of the key and respectively AES_KEYWR3/AES_KEYWR5/AES_KEYWR7 to the last one.
Whenever a new key (AES_KEYWRx) is written to the
hardware, two automatic actions are processed:
- GCM hash subkey generation
- AES_GHASHRx Clear
See Key Writing and Automatic Hash Subkey Calculation for details.
These registers are write-only to prevent the key from being read by another application.Note: To write AES_KEYWRx and start using
the key immediately, AES_EMR.PKRS must be written to 0 prior to writing
AES_KEYWRx.