70.6.2 USB Type-C

The TCPC enables a software implementation of the USB Type-C CC Control and sensing and of the USB Type-C Power Control for VBUS as defined in the Universal Serial Bus Type-C™ Port Controller Interface Specification. The TCPC provides both a user interface compatible with the programmer model of the USB Type-C Port Controller and a direct access to the Configuration Channel (CC) hardware. VBUS detection and control hardware is available through the PIO controller externally to the TCPC.

The Configuration Channel (CC) used in the discovery and configuration of connections across a USB Type-C cable is further defined in the Universal Serial Bus Type-C™ Port Controller Interface Specification.

The Configuration Channel (CC) hardware can be controlled by TCPC_UPC, and the resulting outputs can be observed in TCPC_UPS, as shown in the table and figure that follow.

Table 70-4. Configuration Channel (CC) Hardware to USB PHY Mapping
Configuration Channel Hardware TCPC Register Field
CC Pull-Up Rp TCPC_UPC.RDIPSEL
CC Pull-Down Rd TCPC_UPC.RDIPSEL
CC Status Comparator Threshold TCPC_UPC.TCIDCTSEL
CC Status Comparator Outputs TCPC_UPS.CC2RDT
Figure 70-3. Configuration Channel (CC) Hardware

After any software change in TCPC_UPC or after any change on the CC1 or CC2 pins, the CC comparator outputs in TCPC_UPS.CC1ID and TCPC_UPS.CC2RDT are not valid before some update delay as shown in the Max Delay Update column of the table below.

These update delays must be respected after any TCPC_UPC software change when implementing the CC control and sensing as specified by the Universal Serial Bus Type-C™ Port Controller Interface Specification.

The CC comparator outputs in TCPC_UPS.CC1ID and TCPC_UPS.CC2RDT are debounced by a glitch filter rejecting any pulse of tTCPCfilter = 450 μs or less as shown in the Min Glitch Filtering column of the table below.

Any longer filtering or debouncing, such as during the tCCDebounce time as specified in the Universal Serial Bus Type-C Cable and Connector Specification, must be performed by periodically sampling TCPC_UPS.

Table 70-5. TCPC_UPS Debouncing Times
TCPC_UPS Bit Max Delay Update Min Glitch Filtering
TCPC_UPS.CC1ID 560 μs 450 μs
TCPC_UPS.CC2RDT 560 μs 450 μs