28.6.1 PIT64B Control Register
This register can only be written if the WPCREN bit is cleared in the PIT64B Write Protection Mode Register.
Name: | PIT64B_CR |
Offset: | 0x00 |
Reset: | – |
Property: | Write-only |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
SWRST | |||||||||
Access | W | ||||||||
Reset | – |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
START | |||||||||
Access | W | ||||||||
Reset | – |
Bit 8 – SWRST Software Reset
Value | Description |
---|---|
0 | No effect. |
1 | Performs a software reset, clears the configuration and stops any timer period in progress. |
Bit 0 – START Start Timer
Value | Description |
---|---|
0 | No effect. |
1 | The timer counter is started for 1 or more periods. If the START command is applied during a non-elapsed timer period, there is no effect. Thus, in Continuous mode, the SWRST command is the only command to stop the PIT64B. If PIT64B_MR.SMOD=1 a start is also performed as soon as PIT64B_LSBPR is written (see Single Period Mode and Continuous Period Mode). |