41.6.4 Interrupts

The Interrupt Status registers report error conditions.

The triggering of the CSI interrupt line can be masked by programming the Interrupt Mask registers. By default, all errors are masked. When any bit of these registers is set to 1, it enables the interrupt for a specific error.

The Interrupt Status registers are cleared on read.

The Interrupt Force registers (CSI_INT_FORCE_<group>) are used for test purposes, and trigger interrupt events individually. Setting any bit of these registers to 1 triggers the corresponding interrupt.

The figure below shows the main parts of the interrupt mechanism.