37.6.8.2 Interrupts

The I2S has the following interrupt sources:

  • Receive Ready (RXRDYm): This is an asynchronous interrupt and can be used to wake-up the device from any sleep mode.
  • Receive Overrun (RXORm): This is an asynchronous interrupt and can be used to wake-up the device from any sleep mode.
  • Transmit Ready (TXRDYm): This is an asynchronous interrupt and can be used to wake-up the device from any sleep mode.
  • Transmit Underrun (TXURm): This is an asynchronous interrupt and can be used to wake-up the device from any sleep mode.

Each interrupt source has an interrupt flag associated with it. The interrupt flag in the Interrupt Flag Status and Clear (INTFLAG) register is set when the interrupt condition occurs. Each interrupt can be individually enabled by writing a one to the corresponding bit in the Interrupt Enable Set (INTENSET) register, and disabled by writing a one to the corresponding bit in the Interrupt Enable Clear (INTENCLR) register. An interrupt request is generated when the interrupt flag is set and the corresponding interrupt is enabled. The interrupt request remains active until the interrupt flag is cleared, the interrupt is disabled, or the I2S is reset. Refer to the INTFLAG register for details on how to clear interrupt flags. All interrupt requests from the peripheral are ORed together on system level to generate one combined interrupt request to the NVIC. Refer to the Nested Vector Interrupt Controller for details. The user must read the INTFLAG register to determine which interrupt condition is present.

Note: Interrupts must be globally enabled for interrupt requests to be generated. Refer to Nested Vector Interrupt Controller for details.