3.2 I/O Ports

The following table lists the important I/O ports of the design.

Table 3-1. Input and Output Ports
Port NameDirectionDescription
LANE0_RXD_NInputLane0 RX channel N
LANE0_RXD_PInputLane0 RX channel P
LANE1_RXD_NInputLane1 RX channel N
LANE1_RXD_PInputLane1 RX channel P
LANE2_RXD_NInputLane2 RX channel N
LANE2_RXD_PInputLane2 RX channel P
LANE3_RXD_NInputLane3 RX channel N
LANE3_RXD_PInputLane3 RX channel P
LANE4_RXD_NInputLane4 RX channel N
LANE4_RXD_PInputLane4 RX channel P
LANE5_RXD_NInputLane5 RX channel N
LANE5_RXD_PInputLane5 RX channel P
LANE6_RXD_NInputLane6 RX channel N
LANE6_RXD_PInputLane6 RX channel P
LANE7_RXD_NInputLane7 RX channel N
LANE7_RXD_PInputLane7 RX channel P
LANE0_TXD_NOutputLane0 TX channel N
LANE0_TXD_POutputLane0 TX channel P
LANE1_TXD_NOutputLane1 TX channel N
LANE1_TXD_POutputLane1 TX channel P
LANE2_TXD_NOutputLane2 TX channel N
LANE2_TXD_POutputLane2 TX channel P
LANE3_TXD_NOutputLane3 TX channel N
LANE3_TXD_POutputLane3 TX channel P
REF_CLK_PAD_NInputReference clock N
REF_CLK_PAD_PInputReference clock P
CLK_INInput27 MHZ of CLK
RXInputRX for UART Interface
TCKInputTCLK for Flash Pro Debug
TDIInputTDI for Flash Pro Debug
TMSInputTMS for Flash Pro Debug
TSRTBInputTSRTB for Flash Pro Debug
SLVS_EC_XCEOutputSerial Communication Interface XCE Pin for i2c (Fixed to HIGH)
SLVS_EC_XMASTEROutputMaster/Slave Select (Slave Mode: HIGH, Master Mode: LOW)
SLVS_EC_RSTNOutputSLVS Camera Reset
CLK_50MHZInput50 MHz of On Board Clock
TDOOutputTDO for Flash Pro Debug
SLVS_SCLInput and OutputSLVS Cam I2C SCL
SLVS_SDAInput and OutputSLVS Cam I2C SDA
GPIO_OUT_0[3:0]OutputGPIO_OUT_0 is connected to LED0, 1, 2, 3.
TXOutputTx for UART Interface