36.9.1 DSM Control Register 0

Note:
  1. The modulated output frequency can be greater and asynchronous from the clock that updates this register bit. The bit value may not be valid for higher speed modulator or carrier signals.
  2. MDBIT must be selected as the modulation source for this operation.
Name: MDxCON0
Offset: 0x6A

Bit 76543210 
 MDEN MDOUTMDOPOL   MDBIT 
Access R/WRR/WR/W 
Reset 0000 

Bit 7 – MDEN DSM Module Enable

ValueDescription
1 DSM is enabled and mixing input signals
0 DSM is disabled and has no output

Bit 5 – MDOUT  DSM Output(1)

Displays the current DSM output value

Bit 4 – MDOPOL DSM Output Polarity Select

ValueDescription
1 DSM output signal is inverted; idle high output
0 DSM output signal is not inverted; idle low output

Bit 0 – MDBIT  Modulation Source Signal(2)

Allows direct software control of the modulation source input signal

The modulated output frequency can be greater and asynchronous from the clock that updates this register bit. The bit value may not be valid for higher speed modulator or carrier signals. MDBIT must be selected as the modulation source for this operation.