15.7.8 Event Control

Name: EVCTRL
Offset: 0x17
Reset: 0x00
Property: PAC Write-Protection

Bit 76543210 
        CFDEO 
Access R/W 
Reset 0 

Bit 0 – CFDEO Clock Failure Detector Event Out Enable

This bit controls whether the Clock Failure Detector event output is enabled and an event will be generated when the CFD detects a clock failure.
ValueDescription
0 Clock Failure Detector Event output is disabled, no event will be generated.
1 Clock Failure Detector Event output is enabled, an event will be generated.