15.7.6 32.768 kHz External Crystal Oscillator (XOSC32K) Control

Name: XOSC32K
Offset: 0x14
Reset: 0x0080
Property: PAC Write-Protection

Bit 15141312111098 
    WRTLOCK STARTUP[2:0] 
Access R/WR/WR/WR/W 
Reset 0000 
Bit 76543210 
 ONDEMANDRUNSTDBY EN1KEN32KXTALENENABLE  
Access R/WR/WR/WR/WR/WR/W 
Reset 100000 

Bit 12 – WRTLOCK Write Lock

This bit locks the XOSC32K register for future writes, effectively freezing the XOSC32K configuration.

ValueDescription
0 The XOSC32K configuration is not locked.
1 The XOSC32K configuration is locked.

Bits 10:8 – STARTUP[2:0] Oscillator Start-Up Time

This bit field configures the time after which the XOSC32K clock will be propagated in the design. In order to let a stable clock propagate in the design, the right STARTUP time should be configured after considering the external crystal characteristics and the information provided in the 43.12 External 32 kHz Crystal Oscillator (XOSC32K) Electrical Specifications section of the 43 Electrical Characteristics 85℃ chapter. The actual startup time is the number of selected OSCULP32K cycles + 3 XOSC32K cycles.

Table 15-3. Start-up Time for 32.768 kHz External Crystal Oscillator
STARTUP[2:0] Number of OSCULP32K Clock Cycles Number of XOSC32K Clock Cycles Approximate Equivalent Time
 [s]
0x0 1 3 0.000031
0x1 32 3 0.00098
0x2 2048 3 0.06
0x3 4096 3 0.125
0x4 16384 3 0.5
0x5 32768 3 1
0x6 65536 3 2
0x7 131072 3 4

Bit 7 – ONDEMAND On Demand Control

This bit controls how the XOSC32K behaves when a peripheral clock request is detected. For details, refer to XOSC32K Sleep Behavior.

Bit 6 – RUNSTDBY Run in Standby

This bit controls how the XOSC32K behaves during standby sleep mode. For details, refer to XOSC32K Sleep Behavior.

Bit 4 – EN1K 1.024 kHz Output Enable

ValueDescription
0 The 1.024 kHz output is disabled.
1 The 1.024 kHz output is enabled, and available internally only for RTC.

Bit 3 – EN32K 32.768 kHz Output Enable

ValueDescription
0 The 32.768 kHz output is disabled.
1 The 32.768 kHz output is enabled, and can be routed to GCLK/GCLK_IO.

Bit 2 – XTALEN Crystal Oscillator Enable

This bit controls the connections between the I/O pads and the external clock or crystal oscillator.
ValueDescription
0 External clock connected on XIN32. XOUT32 can be used as general-purpose I/O.
1 Crystal connected to XIN32/XOUT32.

Bit 1 – ENABLE Oscillator Enable

ValueDescription
0 The oscillator is disabled.
1 The oscillator is enabled.