8.2 Physical Memory Map

The high-speed bus is implemented as a bus matrix. All high-speed bus addresses are fixed, and they are never remapped in any way, even during boot. The 32-bit physical address space is mapped as shown in the following table:

Table 8-1. Memory Map
Memory StartAddress PIC32CM1216 PIC32CM6408
Embedded Flash size 0x00000000 128KB 64KB
page number 2048 1024
page size 64 bytes
Embedded Data Flash section size 0x00400000 4KB 2KB
page number 64 32
page size 64 bytes
Embedded high-speed SRAM 0x20000000 16KB 8KB
AHB-APB Bridge A 0x40000000 16KB
AHB-APB Bridge B 0x41000000 64KB
AHB-APB Bridge C 0x42000000 32KB
AHB DIVAS 0x48000000 32B
IOBUS 0x60000000 512B