8.2 Physical Memory Map

The high-speed bus is implemented as a bus matrix. All high-speed bus addresses are fixed, and they are never remapped in any way, even during boot. The 32-bit physical address space is mapped as shown in the following table:

Table 8-1. Memory Map
MemoryStartAddressPIC32CM1216PIC32CM6408
Embedded Flashsize0x00000000128KB64KB
page number20481024
page size64 bytes
Embedded Data Flash sectionsize0x004000004KB2KB
page number6432
page size64 bytes
Embedded high-speed SRAM0x2000000016KB8KB
AHB-APB Bridge A0x4000000016KB
AHB-APB Bridge B0x4100000064KB
AHB-APB Bridge C0x4200000032KB
AHB DIVAS0x4800000032B
IOBUS0x60000000512B