10.6.2 EEPROM Address Register Low and High Byte

The EEARL and EEARH register pair represents the 16-bit value, EEAR. The low byte [7:0] (suffix L) is accessible at the original offset. The high byte [15:8] (suffix H) can be accessed at offset + 0x01. For more details on reading and writing 16-bit registers, refer to accessing 16-bit registers in the section above.

When addressing I/O registers as data space using LD and ST instructions, the provided offset must be used. When using the I/O specific commands IN and OUT, the offset is reduced by 0x20, resulting in an I/O address offset within 0x00 - 0x3F.

The device is a complex microcontroller with more peripheral units than can be supported within the 64 locations reserved in Opcode for the IN and OUT instructions. For the extended I/O space from 0x60 in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.

Name: EEARL and EEARH
Offset: 0x41
Reset: 0xXX
Property: When addressing as I/O Register: address offset is 0x21

Bit 15141312111098 
       EEAR[9:8] 
Access R/WR/W 
Reset xx 
Bit 76543210 
 EEAR[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset xxxxxxxx 

Bits 9:0 – EEAR[9:0] EEPROM Address

The EEPROM Address Registers, EEARH and EEARL, specify the EEPROM address in the 1 KB EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 1023. The initial value of EEAR is undefined. A proper value must be written before the EEPROM may be accessed.