To generate an output from the PWM the Output Compare Pin of Timer1
(OC1A) is set up as output.
The clock source for the timer is prepared by starting the PLL and locked to
the system clock (required).
The PLL takes approximately 100ms to lock onto the system clock and it is
therefore necessary to wait for the PLL lock flag before proceeding.
When the PLL is locked it is selected as clock source for the timer.
The PWM mode is selected so that the OC1A pin toggles on compare match.
Top value of the timer is set to 0xFF. The Top value affects the resolution
and the base frequency of the PWM – the higher the Top value is the higher
resolution and the lower base frequency.
The prescaler is set, which also starts the timer.
The Overflow interrupt is enabled.
Figure 3-2. Flowchart of init() -
Initialize Timer1 and I/O Pin for Fast PWM Mode
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
