19.15.1 ADC Multiplexer Selection Register
| Name: | ADMUX |
| Offset: | 0x1B |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| REFSn[1:0] | MUXn[2:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 | ||||
Bits 7:6 – REFSn[1:0] Reference Selection [n = 1:0]
These bits select the voltage reference for the ADC. If these bits are changed during a conversion, the change will not go in effect until this conversion is complete (ADIF in ADCSRA is set).
| REFS[1:0] | Voltage Reference Selection |
|---|---|
| 00 | Vcc |
| 01 | Internal 1.1V reference |
| 10 | Internal 2.2V reference |
| 11 | Internal 4.3V reference |
Bits 2:0 – MUXn[2:0] Analog Channel Selection [n = 2:0]
The value of these bits selects which analog inputs are connected to the ADC. If these bits are changed during a conversion, the change will not go in effect until this conversion is complete (ADCSRA.ADIF is set).
| MUX[2:0] | Single Ended Input | Pin name |
|---|---|---|
| 000 | ADC0 | PA[0] |
| 001 | ADC1 | PA[1] |
| 010 | ADC2 | PA[5] |
| 011 | ADC3 | PA[6] |
| 100 | ADC4 | PB[0] |
| 101 | ADC5 | PB[1] |
| 110 | ADC6 | PB[2] |
| 111 | ADC7 | PB[3] |