17.6 Accessing 16-bit Timer/Counter Registers
The TCNT0, OCR0A/B, and ICR0 are 16-bit registers that can be accessed by the AVR CPU via the 8-bit data bus. The 16-bit register must be accessed byte-wise, using two read or write operations. Each 16-bit timer has a single 8-bit TEMP register for temporary storing of the high byte of the 16-bit access. The same temporary register is shared between all 16-bit registers within each 16-bit timer.
Accessing the low byte triggers the 16-bit read or write operation: When the low byte of a 16-bit register is written by the CPU, the high byte that is currently stored in TEMP and the low byte being written are both copied into the 16-bit register in the same clock cycle. When the low byte of a 16-bit register is read by the CPU, the high byte of the 16-bit register is copied into the TEMP register in the same clock cycle as the low byte is read, and must be read subsequently.
Not all 16-bit accesses uses the temporary register for the high byte. Reading the OCR0A/B 16-bit registers does not involve using the temporary register.
16-bit Access
The following code examples show how to access the 16-bit Timer Registers assuming that no interrupts updates the temporary register. The same principle can be used directly for accessing the OCR0A/B and ICR0 Registers. Note that when using C, the compiler handles the 16-bit access.
Assembly Code Example(1)
... ; Set TCNT0 to 0x01FF ldi r17,0x01 ldi r16,0xFF out TCNT0H,r17 out TCNT0L,r16 ; Read TCNT0 into r17:r16 in r16,TCNT0L in r17,TCNT0H ...
The assembly code example returns the TCNT0 value in the r17:r16 register pair.
unsigned int i; ... /* Set TCNT0 to 0x01FF */ TCNT0 = 0x1FF; /* Read TCNT0 into i */ i = TCNT0; ...
- The example code assumes that the part specific header file is included. For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions must be replaced with instructions that allow access to extended I/O. Typically “LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
Atomic Read
It is important to notice that accessing 16-bit registers are atomic operations. If an interrupt occurs between the two instructions accessing the 16-bit register, and the interrupt code updates the temporary register by accessing the same or any other of the 16-bit Timer Registers, then the result of the access outside the interrupt will be corrupted. Therefore, when both the main code and the interrupt code update the temporary register, the main code must disable the interrupts during the 16-bit access.
The following code examples show how to perform an atomic read of the TCNT0 Register contents. The OCR0A/B or ICR0 Registers can be ready by using the same principle.
Assembly Code Example(1)
TIM16_ReadTCNT0: ; Save global interrupt flag in r18,SREG ; Disable interrupts cli ; Read TCNT0 into r17:r16 in r16,TCNT0L in r17,TCNT0H ; Restore global interrupt flag out SREG,r18 ret
The assembly code example returns the TCNT0 value in the r17:r16 register pair.
unsigned int TIM16_ReadTCNT0( void ) { unsigned char sreg; unsigned int i; /* Save global interrupt flag */ sreg = SREG; /* Disable interrupts */ _CLI(); /* Read TCNT0 into i */ i = TCNT0; /* Restore global interrupt flag */ SREG = sreg; return i; }
- The example code assumes that the part specific header file is included. For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions must be replaced with instructions that allow access to extended I/O. Typically “LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
Atomic Write
The following code examples show how to do an atomic write of the TCNT0 Register contents. Writing any of the OCR0A/B or ICR0 Registers can be done by using the same principle.
Assembly Code Example(1)
TIM16_WriteTCNT0: ; Save global interrupt flag in r18,SREG ; Disable interrupts cli ; Set TCNT0 to r17:r16 out TCNT0H,r17 out TCNT0L,r16 ; Restore global interrupt flag out SREG,r18 ret
The assembly code example requires that the r17:r16 register pair contains the value to be written to TCNT0.
void TIM16_WriteTCNT0( unsigned int i ) { unsigned char sreg; unsigned int i; /* Save global interrupt flag */ sreg = SREG; /* Disable interrupts */ _CLI(); /* Set TCNT0 to i */ TCNT0 = i; /* Restore global interrupt flag */ SREG = sreg; }
- The example code assumes that the part specific header file is included. For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions must be replaced with instructions that allow access to extended I/O. Typically “LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.