57.12 Embedded Flash Characteristics

Table 57-49. Flash Characteristics
Parameter Conditions Min. Typ. Max. Unit
ERASE Line Assertion Time – 230 – – ms
Program Cycle Time Write Page – 1.5 – ms
Erase Page – 10 50 ms
Erase Small Sector (8 Kbytes) – 80 200 ms
Erase Larger Sector (112 or 128 Kbytes) 800 1500 ms
Full Chip Erase 512 Kbytes – 3 6 s
1 Mbytes – 6 12 s
2 Mbytes (only for SAMV71) – 13 24 s
Data Retention At TA = 85°C, after 10K cycles (see Note 1) 10 – – Years
At TA = 85°C, after 1K cycles (see Note 1) 20 – – Years
At TA = 105°C, after 1K cycles (see Note 1) 5.5 – – Years
Endurance Write/Erase cycles per page, block or sector at 25°C 100K Cycles
Write/Erase cycles per page, block or sector at 105°C 10K – – Cycles
Flash Active Current Random 128-bit read at maximum frequency at 25°C on VDDCORE =1.2V – 16 20 mA
on VDDIO – 2 10
Program at 25°C on VDDCORE =1.2V – 2 3
on VDDIO – 8 12
Erase at 25°C on VDDCORE =1.2V – 2 2
on VDDIO – 8 12
Note:
  1. Cycling over full temperature range.

Maximum operating frequencies are shown in the following table, but are limited by the Embedded Flash access time when the processor is fetching code out of it. These tables provide the device maximum operating frequency defined by the field FWS of the EEFC_FMR register. This field defines the number of wait states required to access the Embedded Flash Memory.

Table 57-50. Embedded Flash Wait States for Worst-Case Conditions
FWS Read Operations Maximum Operating Frequency (MHz) - VDDIO 3.0V
0 1 cycle 23
1 2 cycles 46
2 3 cycles 69
3 4 cycles 92
4 5 cycles 115
5 6 cycles 138
6 7 cycles 150