57.11 12-bit DAC Characteristics
| Symbol | Parameter | Conditions | Min. | Typ. | Max. | Unit |
|---|---|---|---|---|---|---|
| IVDDIN | Current Consumption | Sleep mode (Clock OFF) | – | 10 | – | µA |
|
Normal mode with one output on, DACC_ACR.IBCTLCHx =3 (see Note 1) FS = 1 MSps, no RLOAD, VDDIN = 3.3V |
– | 200 | 800 | |||
|
Normal mode with one output on, DACC_ACR.IBCTLCHx =1 (see Note 1) FS = 500 KSps, no RLOAD, VDDIN = 3.3V |
– | 100 | 400 | |||
|
Bypass mode (output buffer off) with one output on, DACC_ACR.IBCTLCHx =0 (see Note 1) FS = 500 KSps, no RLOAD, VDDIN = 3.3V |
– | 10 | 30 | |||
| PSRR | Power Supply RejectionRatio (VDDIN) |
VDDIN ±10 mV Up to 10 kHz |
– | 70 | – | dB |
Note: 1. The maximum conversion rate versus the
configuration of DACC_ACR.IBCTL is shown in the following table.
| DACC_ACR.IBCTLCHx | Maximum Conversion Rate |
|---|---|
| 0 | Bypass |
| 1 | 500 ks/s |
| 2 | N/A |
| 3 | 1 Ms/s |
| Symbol | Parameter | Conditions | Min. | Typ. | Max. | Unit | |
|---|---|---|---|---|---|---|---|
| VVREFP | Positive Voltage Reference | Externally decoupled 1 µF | 1.7 | – | VDDIN | V | |
| IVREFP | DC Current on VREFP | – | – | 2.5 | – | µA | |
Note: VREFP is the positive reference shared with AFE and may have a different
value for AFE. Refer to the AFE electrical characteristics if AFE is used. The
VREFN pin must be connected to ground.
| Symbol | Parameter | Conditions | Min. | Typ. | Max. | Unit | |
|---|---|---|---|---|---|---|---|
| fDAC | DAC Clock Frequency | – | – | – | 12 | MHz | |
| fS | Sampling Frequency | – | – | fDAC / 12 | – | MHz | |
| Symbol | Parameter | Conditions | Min. | Typ. | Max. | Unit |
|---|---|---|---|---|---|---|
| INL | Integral Non-linearity (see Note 1) | No RLOAD | -10 | ±2 | 10 | LSB |
| CLOAD = 50 pF | ||||||
| DACC_ACR.IBTLCHx = 3 | ||||||
| DNL | Differential Non-linearity (see Note 1) | No RLOAD | -4 | ±2 | 4 | LSB |
| CLOAD = 50 pF | ||||||
| DACC_ACR.IBTLCHx = 3 | ||||||
| EO | Offset Error (see Note 2) | – | -8 | 1 | 8 | mV |
| EG | Gain Error | No RLOAD | -1 | – | 1 | %.FSR |
| CLOAD = 50 pF | ||||||
| DACC_ACR.IBTLCHx = 3 |
Note:
- Best-fit Curve from 0x080 to 0xF7F.
- Difference between DACx at 0x800 and VVREFP/2.
| Symbol | Parameter | Conditions | Min. | Typ. | Max. | Unit | |
|---|---|---|---|---|---|---|---|
| tSTART | Startup Time | From DAC on (CHER.CHx) to DAC ready to convert (CHSR.DACRDYx) | – | 10 | – | µs | |
| tS | Settling Time Code to Code; i.e., code(n-1) to code(n) ± 0.5 LSB | RLOAD =
5 Kohm CLOAD = 50 pF |
– | 0.5 | – | µs | |
| Settling Time Full-scale; i.e., 0x000 to 0xFFF ±0.5 LSB | DACC_ACR.IBCTLCHx = 3 | – | 1 | – | µs | ||
| FS = 1 MSps | |||||||
| Slew Rate | – | 3 | – | V/µs | |||
| Symbol | Parameter | Conditions | Min. | Typ. | Max. | Unit |
|---|---|---|---|---|---|---|
| RLOAD | Output Resistor Load | Output load resistor | 5 | – | – | kOhm |
| CLOAD | Output Capacitor Load | Output load capacitor | – | – | 50 | pF |
| VDACx_MIN | Minimum Output Voltage on DACx | Code = 0x000 No RLOAD, CLOAD = 50 pF, DACC_ACR.IBCTLCHx =3 | – | 0.1 | 0.5 | %. VVREFP |
| VDACx_MAX | Maximum Output Voltage on DACx | Code = 0xFFF No RLOAD CLOAD = 50 pF, DACC_ACR.IBCTLCHx =3 | 99.5 | 99.9 | – | %. VVREFP |
| FSR | Full Scale Range | Code = 0x000 to 0xFFF No RLOAD CLOAD = 50 pF, DACC_ACR.IBCTLCHx =3 | 99 | 99.8 | – | %. VVREFP |
| ROUT | DAC Output Resistor | 0.3 < VDACx < VDDIN -0.3V, DACC_ACR.IBCTLCHx =3, RLOAD = 5 KOhm | – | 15 | – | Ohm |
| VDACx > VDDIN -0.3V, DACC_ACR.IBCTLCHx =3, RLOAD = 5 kOhm | – | 550 | – | Ohm | ||
| VDACx < 0.3V, DACC_ACR.IBCTLCHx = 3, RLOAD= 5 kOhm | – | 550 | – | Ohm | ||
| VDACx = VVREFP/2, DACC_ACR.IBCTLCHx = 0 (Bypass mode, buffer off), No RLOAD | – | 300 | – | kOhm |