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15.13.21 IPR3
Peripheral Interrupt Priority Register 3| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| | | | RC1IP | TX1IP | | | BCL1IP | SSP1IP | |
| Access | | | R/W | R/W | | | R/W | R/W | |
| Reset | | | 1 | 1 | | | 1 | 1 | |
Bit 5 – RCxIP EUSARTx Receive Interrupt Priority
bit
| Value | Description |
|---|
| 1 |
High
priority |
| 0 |
Low
priority |
Bit 4 – TXxIP EUSARTx Transmit Interrupt Priority
bit
| Value | Description |
|---|
| 1 |
High
priority |
| 0 |
Low
priority |
Bit 1 – BCLxIP MSSPx Bus Collision Interrupt Priority
bit
| Value | Description |
|---|
| 1 |
High
priority |
| 0 |
Low
priority |
Bit 0 – SSPxIP Synchronous Serial Port 'x' Interrupt
Priority bit
| Value | Description |
|---|
| 1 |
High
priority |
| 0 |
Low
priority |
