2.2 IP Blocks Used in the Design
(Ask a Question)The following table lists the IP blocks used in the FIR filter design.
IP Block | Description |
---|---|
COREFIR_PF_C0 | The COREFIR_PF_C0 IP is used in re-loadable coefficient mode to support low-pass, high-pass, band-pass, and band-stop filters. |
COREFFT_C0 | The COREFFT_C0 IP generates the frequency spectrum of the filtered data. |
FILTERCONTROL_FSM_0 | The filter control FSM block handles the data flow and controls signals of the FIR filter and FFT. It loads the filtered data with respect to the corresponding output buffer and moves the FFT output data to the corresponding FFT real and imaginary buffers. |
UART_IF | The UART_IF block consists of a finite state machine for handling control
operations between UART and the fabric logic. Control operations include the
following:
|
PF_TPSRAM | Five instances of PF_TPSRAM blocks are used in the design to store coefficients, FIR input data, FIR output data, FFT real, and FFT imaginary output data. |
PF_CCC_C0 | The PF_CCC_C0 IP is configured to take a 50 MHz reference clock as an input and generates 25 MHz and 200 MHz output clocks. |