34.5.3 OPAxCON2
| Name: | OPAxCON2 | 
| Offset: | 0x090E | 
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| NCH[2:0] | PCH[2:0] | ||||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
Bits 6:4 – NCH[2:0] Operational Amplifier Inverting Input Channel Selection
| Value | Description | 
|---|---|
| 111 | Reserved | 
| 110 | Reserved | 
| 101 | DAC2_OUT | 
| 100 | DAC1_OUT | 
| 011 | Reserved | 
| 010 | OPAxIN- (NSS) | 
| 001 | Internal Resistor Ladder (GSEL) | 
| 000 | No Connection | 
Bits 2:0 – PCH[2:0] Operational Amplifier Noninverting Input Channel Selection
| Value | Description | 
|---|---|
| 111 | Reserved | 
| 110 | Reserved | 
| 101 | DAC2_OUT | 
| 100 | DAC1_OUT | 
| 011 | VDD / 2 | 
| 010 | OPAxIN+ (PSS) | 
| 001 | Internal Resistor Ladder (GSEL) | 
| 000 | VSS | 
