3.2.4.3 PIOC Bank

The PIOC bank is mainly used for RPi, and JTAG interface over power rails VDDIN33 and VDDSDMMC2. The following schematic shows the PIOC bank distribution.

Figure 3-18. SAMA7D6 Series PIOC Bank Distribution

The following table describes each PIOC bank function.

Table 3-5. SAMA7D6 Series PIOC Bank Pin Assignment and Signal Description
PIOPower RailFunctionSignal Description

PC0

VDDIN33

RPI_GPCLK2

RPI GPCLK2 signal/USBA CC2 (not connected by default, R121 DNP)

PC1

VDDIN33

GMAC0_INT

SODIMM interrupt line

PC2

VDDIN33

MCP16502_INT

MCP16502 interrupt line

PC3

VDDIN33

RPI_GPIO17

RPI GPIO17 signal

PC4

VDDIN33

RPI_GPIO27

RPI GPIO27 signal

PC5

VDDIN33

MBUS1_AN

mikroBUS1 analog input

PC6

VDDIN33

FLEXCOM0_IO1

LVDS/MIPI/MBUS1/MBUS2/RPI/M.2 TWCK

PC7

VDDIN33

FLEXCOM0_IO0

LVDS/MIPI/MBUS1/MBUS2/RPI/M.2 TWD

PC8

VDDIN33

USBA_VBUS_DETECT

USBA VBUS detection

PC9

VDDIN33

MBUS_nRST

mikroBUS1 and mikroBUS2 Reset signal

PC10

VDDIN33

USER_BUTTON

Board user button

PC11

VDDIN33

RPI_GPIO25

RPI GPIO25 signal

PC12

VDDIN33

RPI_GPIO24

RPI GPIO24 signal

PC13

VDDIN33

MBUS2_AN

mikroBUS2 analog input

PC14

VDDIN33

RPI_I2S_DIN0

RPI I2S DIN0 signal

PC15

VDDIN33

RPI_I2S_WS

RPI I2S WS signal

PC16

VDDIN33

RPI_I2S_CK

RPI I2S Clock signal

PC17

VDDIN33

RPI_I2S_DOUT0

RPI I2S DOUT0 signal

PC18

VDDIN33

PC18 PIO

USBB overcurrent detection/RPI GPIO16 signal (not connected by default, R104 DNP)

PC19

VDDIN33

PC19 PIO

USBC overcurrent detection/RPI GPIO26 signal (not connected by default, R109 DNP)

PC20

VDDIN33

USBB_EN_5V

USBB Enable signal

PC21

VDDIN33

USBC_EN_5V

USBC Enable signal

PC22

VDDIN33

JTAG_NTRST

JTAG NTRST signal

PC23

VDDIN33

JTAG_TCK

JTAG TCK signal

PC24

VDDIN33

JTAG_TMS

JTAG TMS signal

PC25

VDDIN33

JTAG_TDI

JTAG TDI signal

PC26

VDDIN33

JTAG_TDO

JTAG TDO signal

PC27

VDDSDMMC2

PC27 PIO

M.2 SDMMC CMD signal/M.2 SPI MOSI signal

PC28

VDDSDMMC2

PC28 PIO

M.2 SDMMC CMD signal/M.2 SPI MISO signal

PC29

VDDSDMMC2

PC29 PIO

M.2 SDMMC DAT0 signal/M.2 SPI clock signal

PC30

VDDSDMMC2

SDMMC2_DAT1

M.2 SDMMC2 DAT1 signal

PC31

VDDSDMMC2

SDMMC2_DAT2

M.2 SDMMC2 DAT2 signal