27.6.6 Standby Configuration
Symbol | Description | Symbol | Description | Symbol | Description |
---|---|---|---|---|---|
R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
K | Write to clear | S | Software settable bit | — | — |
Name: | STDBYCFG |
Offset: | 0x0008 |
Reset: | 0x0004 |
Property: | PAC Write-Protection |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
LPRAM | RAMCFG | ||||||||
Access | R/W | R/W | |||||||
Reset | 1 | 0 |
Bit 2 – LPRAM Low Power RAM Enable
Value | Description |
---|---|
0x0 | RAM is not retained in standby when Low Power mode is active |
0x1 | RAM is retained in standby when Low Power mode is active |
Bit 0 – RAMCFG Standby Mode RAM Configuration
Value | Description |
---|---|
0 | All the RAMs are retained (RET) |
1 | Only the first 32kB are retained (OFF) |