24.8.2 Control B in COUNT16 mode (CTRLA.MODE=1)

Table 24-21. Register Bit Attribute Legend
Symbol Description Symbol Description Symbol Description
R Readable bit HC Cleared by Hardware (Grey cell) Unimplemented
W Writable bit HS Set by Hardware X Bit is unknown at Reset
K Write to clear S Software settable bit — —
Name: CTRLB
Offset: 0x02
Reset: 0x0000
Property: PAC Write-Protection, Enable-Protected

Bit 15141312111098 
 SEPTOACTF[2:0] DEBF[2:0] 
Access R/WR/WR/WR/WR/WR/WR/W 
Reset 0000000 
Bit 76543210 
 DMAENRTCOUTDEBASYNCDEBMAJ  GP2ENGP0EN 
Access R/WR/WR/WR/WR/WR/W 
Reset 000000 

Bit 15 – SEPTO Separate Tamper Outputs

ValueDescription
0 IN[n] is compared to OUT[0] (backward-compatible).
1 IN[n] is compared to OUT[n].

Bits 14:12 – ACTF[2:0] Active Layer Frequency

These bits define the prescaling factor for the RTC clock output (OUT) used during active layer protection in terms of the CLK_RTC.
ValueNameDescription
0x0 DIV2 CLK_RTC_OUT = CLK_RTC / 2
0x1 DIV4 CLK_RTC_OUT = CLK_RTC / 4
0x2 DIV8 CLK_RTC_OUT = CLK_RTC / 8
0x3 DIV16 CLK_RTC_OUT = CLK_RTC / 16
0x4 DIV32 CLK_RTC_OUT = CLK_RTC / 32
0x5 DIV64 CLK_RTC_OUT = CLK_RTC / 64
0x6 DIV128 CLK_RTC_OUT = CLK_RTC / 128
0x7 DIV256 CLK_RTC_OUT = CLK_RTC / 256

Bits 10:8 – DEBF[2:0] Debounce Frequency

These bits define the prescaling factor for the input debouncers in terms of the CLK_RTC.
ValueNameDescription
0x0 DIV2 CLK_RTC_DEB = CLK_RTC / 2
0x1 DIV4 CLK_RTC_DEB = CLK_RTC / 4
0x2 DIV8 CLK_RTC_DEB = CLK_RTC / 8
0x3 DIV16 CLK_RTC_DEB = CLK_RTC / 16
0x4 DIV32 CLK_RTC_DEB = CLK_RTC / 32
0x5 DIV64 CLK_RTC_DEB = CLK_RTC / 64
0x6 DIV128 CLK_RTC_DEB = CLK_RTC / 128
0x7 DIV256 CLK_RTC_DEB = CLK_RTC / 256

Bit 7 – DMAEN DMA Enable

The RTC can trigger a DMA request when the timestamp is ready in the TIMESTAMP register.
ValueDescription
0 Tamper DMA request is disabled. Reading TIMESTAMP has no effect on INTFLAG.TAMPER.
1 Tamper DMA request is enabled. Reading TIMESTAMP will clear INTFLAG.TAMPER.

Bit 6 – RTCOUT RTC Output Enable

ValueDescription
0 The RTC active layer output is disabled.
1 The RTC active layer output is enabled.

Bit 5 – DEBASYNC Debouncer Asynchronous Enable

ValueDescription
0 The tamper input debouncers operate synchronously.
1 The tamper input debouncers operate asynchronously.

Bit 4 – DEBMAJ Debouncer Majority Enable

ValueDescription
0 The tamper input debouncers match three equal values.
1 The tamper input debouncers match majority two of three values.

Bit 1 – GP2EN General Purpose 2 Enable

ValueDescription
0 COMP1 compare function enabled. GP2/GP3 disabled.
1 COMP1 compare function disabled. GP2/GP3 enabled.

Bit 0 – GP0EN General Purpose 0 Enable

ValueDescription
0 COMP0/1 compare function enabled. GP0/GP1 disabled.
1 COMP0/1 compare function disabled. GP0/GP1 enabled.