Jump to main content
24.8.13 General Purpose n
Table 24-32. Register Bit Attribute
Legend
Symbol
Description
Symbol
Description
Symbol
Description
R Readable bit
HC Cleared by Hardware
(Grey cell)
Unimplemented
W Writable bit
HS Set by Hardware
X Bit is unknown at Reset
K Write to clear
S Software settable bit
—
—
Name: GPn Offset: 0x40 + n*0x04 [n=0..3] Reset: 0x00000000 Property: PAC Write-Protection,
Write-Synchronized
Bit 31 30 29 28 27 26 25 24 GP[31:24] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 23 22 21 20 19 18 17 16 GP[23:16] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 15 14 13 12 11 10 9 8 GP[15:8] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bit 7 6 5 4 3 2 1 0 GP[7:0] Access R/W R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0
Bits 31:0 – GP[31:0] General
Purpose
These bits are for
user-defined general purpose use, see General Purpose
Registers .
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.
