39.8 Register Summary

For descriptions and definitions of both Register and bitfield properties, refer to Register Properties.

OffsetNameBit Pos.76543210
0x00SETUP07:0  NWE SETUP[5:0]
15:8  NCS WR SETUP[5:0]
23:16  NRD SETUP[5:0]
31:24  NCS RD SETUP[5:0]
0x04SETUP17:0  NWE SETUP[5:0]
15:8  NCS WR SETUP[5:0]
23:16  NRD SETUP[5:0]
31:24  NCS RD SETUP[5:0]
0x04PULSE07:0 NWE PULSE[6:0]
15:8 NCS WR PULSE[6:0]
23:16 NRD PULSE[6:0]
31:24 NCS RD PULSE[6:0]
0x08SETUP27:0  NWE SETUP[5:0]
15:8  NCS WR SETUP[5:0]
23:16  NRD SETUP[5:0]
31:24  NCS RD SETUP[5:0]
0x08PULSE17:0 NWE PULSE[6:0]
15:8 NCS WR PULSE[6:0]
23:16 NRD PULSE[6:0]
31:24 NCS RD PULSE[6:0]
0x08CYCLE07:0NWE CYCLE[7:0]
15:8       NWE CYCLE[8]
23:16NRD CYCLE[7:0]
31:24       NRD CYCLE[8]
0x0CSETUP37:0  NWE SETUP[5:0]
15:8  NCS WR SETUP[5:0]
23:16  NRD SETUP[5:0]
31:24  NCS RD SETUP[5:0]
0x0CPULSE27:0 NWE PULSE[6:0]
15:8 NCS WR PULSE[6:0]
23:16 NRD PULSE[6:0]
31:24 NCS RD PULSE[6:0]
0x0CCYCLE17:0NWE CYCLE[7:0]
15:8       NWE CYCLE[8]
23:16NRD CYCLE[7:0]
31:24       NRD CYCLE[8]
0x0CMODE07:0  EXNW MODE[1:0]  WRITE MODEREAD MODE
15:8   DBW   BAT
23:16   TDF MODETDF CYCLES[3:0]
31:24  PS[1:0]   PMEN
0x10PULSE37:0 NWE PULSE[6:0]
15:8 NCS WR PULSE[6:0]
23:16 NRD PULSE[6:0]
31:24 NCS RD PULSE[6:0]
0x10CYCLE27:0NWE CYCLE[7:0]
15:8       NWE CYCLE[8]
23:16NRD CYCLE[7:0]
31:24       NRD CYCLE[8]
0x10MODE17:0  EXNW MODE[1:0]  WRITE MODEREAD MODE
15:8   DBW   BAT
23:16   TDF MODETDF CYCLES[3:0]
31:24  PS[1:0]   PMEN
0x14CYCLE37:0NWE CYCLE[7:0]
15:8       NWE CYCLE[8]
23:16NRD CYCLE[7:0]
31:24       NRD CYCLE[8]
0x14MODE27:0  EXNW MODE[1:0]  WRITE MODEREAD MODE
15:8   DBW   BAT
23:16   TDF MODETDF CYCLES[3:0]
31:24  PS[1:0]   PMEN
0x18MODE37:0  EXNW MODE[1:0]  WRITE MODEREAD MODE
15:8   DBW   BAT
23:16   TDF MODETDF CYCLES[3:0]
31:24  PS[1:0]   PMEN

0x1C

...

0xE3

Reserved         
0xE4WPMR7:0       WPEN
15:8WPKEY [7:0]
23:16WPKEY [15:8]
31:24WPKEY [23:16]
0xE8WPSR7:0       WPVS
15:8WPVSRC [7:0]
23:16WPVSRC [15:8]
31:24