46.7 Wake-Up Time

Conditions:

  • VDDIN = 3.3V
  • LDO Regulation mode
  • CPU clock = OSC16M @12Mhz
  • 1 Wait-state
  • Cache enabled
  • Flash Fast Wake up enabled (NVMCTRL.CTRLB.FWUP=1)
  • Flash in WAKEUPINSTANT mode (NVMCTRL.CTRLB.SLEEPPRM=1)

For IDLE and STANDBY, CPU sets an IO by writing PORT->IOBUS without jumping in an interrupt handler (Cortex M0+ register PRIMASK=1). The wake-up time is measured between the edge of the wake-up input signal and the edge of the GPIO pin.

For Backup, the exit of mode is done through RTC wake-up. The wake-up time is measured between the toggle of the RTC pin and the set of the IO done by the first executed instructions after reset.

For OFF mode, the exit of mode is done through reset pin, the time is measured between the rising edge of the RESETN signal and the set of the IO done by the first executed instructions after reset.
Table 46-9. Wake-Up Timing
Sleep ModeConditionTyp.Unit
IDLEPL2 or PL01.2µs
STANDBYPL0

PM.PLSEL.PLDIS=1 (see errata 13674 for revision A)

PDCFG default5.1µs
PD012 forced active PDCFG=32.1
PL2

Voltage scaling at default values: SUPC->VREG.VSVSTEP=0 SUPC->VREG.VSPER=0

PDCFG default76µs
PD012 forced active PDCFG=375
PL2 Voltage scaling at fastest setting: SUPC->VREG.VSVSTEP=15 SUPC->VREG.VSPER=0PDCFG default16µs
PD012 forced active PDCFG=315µs
BACKUP 90µs
OFF 2200µs