46.5 Maximum Clock Frequencies

Table 46-5. Maximum GCLK Generator Output Frequencies(1)
SymbolDescriptionConditionsFmaxUnits
PL0PL2
Fgclkgen[0:2]GCLK Generator output Frequency-2496MHz
Fgclkgen[3:8]undivided2496MHz
Fgclkgen[3:8]divided1666MHz
Note:
  1. These values are based on simulation. They are not covered by production test limits or characterization.
Table 46-6. Maximum Peripheral Clock Frequencies(1)
SymbolDescriptionConditionsMax.Units
PL0PL2
fCPUCPU clock frequency-1248MHz
fAHBAHB clock frequency-1248MHz
fAPBAAPBA clock frequencyClock domain = BACKUP66MHz
fAPBAAPBA clock frequencyClock domain = Low Power1248MHz
fAPBBAPBB clock frequency-1248MHz
fAPBCAPBC clock frequency-
fAPBDAPBD clock frequency-
fAPBEAPBE clock frequency-
fGCLK_DFLL48M_REFDFLL48M Reference clock frequency-NA33kHz
fGCLK_DPLLFDPLL96M Reference clock frequency-22MHz
fGCLK_DPLL_32KFDPLL96M 32k Reference clock frequency-32100kHz
fGCLK_EICEIC input clock frequency-1248MHz
fGCLK_USBUSB input clock frequency-NA60MHz
fGCLK_EVSYS_CHANNEL_0EVSYS channel 0 input clock frequency-1248MHz
fGCLK_EVSYS_CHANNEL_1EVSYS channel 1 input clock frequency-
fGCLK_EVSYS_CHANNEL_2EVSYS channel 2 input clock frequency-
fGCLK_EVSYS_CHANNEL_3EVSYS channel 3 input clock frequency-
fGCLK_EVSYS_CHANNEL_4EVSYS channel 4 input clock frequency-
fGCLK_EVSYS_CHANNEL_5EVSYS channel 5 input clock frequency-
fGCLK_EVSYS_CHANNEL_6EVSYS channel 6 input clock frequency-
fGCLK_EVSYS_CHANNEL_7EVSYS channel 7 input clock frequency-
fGCLK_EVSYS_CHANNEL_8EVSYS channel 8 input clock frequency-
fGCLK_EVSYS_CHANNEL_9EVSYS channel 9 input clock frequency-
fGCLK_EVSYS_CHANNEL_10EVSYS channel 10 input clock frequency-
fGCLK_EVSYS_CHANNEL_11EVSYS channel 11 input clock frequency-
fGCLK_SERCOMx_SLOWCommon SERCOM slow input clock frequency-15MHz
fGCLK_SERCOM0_CORESERCOM0 input clock frequency-1248MHz
fGCLK_SERCOM1_CORESERCOM1 input clock frequency-
fGCLK_SERCOM2_CORESERCOM2 input clock frequency-
fGCLK_SERCOM3_CORESERCOM3 input clock frequency-
fGCLK_SERCOM4_CORESERCOM4 input clock frequency-
fGCLK_SERCOM5_CORESERCOM5 input clock frequency-
fGCLK_TCC0, GCLK_TCC1TCC0,TCC1 input clock frequency-2496MHz
fGCLK_TCC2, GCLK_TC0TCC2,TC0 input clock frequency-1248MHz
fGCLK_TC1, GCLK_TC2TC1,TC2 input clock frequency-
fGCLK_TC3, GCLK_TC4TC3,TC4 input clock frequency-
fGCLK_ADCADC input clock frequency-1248MHz
fGCLK_ACAC digital input clock frequency-
fGCLK_DACDAC input clock frequency-
fGCLK_PTCPTC input clock frequency-
fGCLK_CCLCCL input clock frequency-
Note:
  1. These values are based on simulation. They are not covered by production test limits or characterization.