2.3.2 REGOUT Serial Instruction Execution

The REGOUT control code allows for data to be extracted from the device in ICSP mode. It is used to clock the contents of the VISI register out of the device over the PGEDx pin. After the REGOUT control code is received, the CPU is held Idle for eight cycles. After these eight cycles, an additional 16 cycles are required to clock the data out (see Figure 2-4).

The REGOUT code is unique as the PGEDx pin is an input when the control code is transmitted to the device. However, after the control code is processed, the PGEDx pin becomes an output as the VISI register is shifted out.

Note:
  1. After the contents of VISI are shifted out, the dsPIC33CK256MC006 devices maintain PGEDx as an output until the first rising edge of the next clock is received.
  2. Data changes on the falling edge and latches on the rising edge of PGECx. For all data transmissions, the Least Significant bit (LSb) is transmitted first.
Figure 2-4. REGOUT Serial Execution