20.2.8 Sleep Modes
The SAM devices have several sleep modes. The sleep mode controls which clock systems on the device will remain enabled or disabled when the device enters a low power sleep mode. Table 20-3 lists the clock settings of the different sleep modes.
Sleep mode | System clock | CPU clock | AHB/AHB clock | GCLK clocks | Oscillators (ONDEMAND = 0) | Oscillators (ONDEMAND = 1) | Regulator mode | RAM mode |
---|---|---|---|---|---|---|---|---|
Idle | Run | Stop | Run if requested | Run | Run | Run if requested | Normal | Normal |
Standby | Stop | Stop | Run if requested | Run if requested | Run if requested or RUNSTDBY = 1 | Run if requested | Low pwer | Low pwer |
Backup | Stop | Stop | Stop | Stop | Stop | Stop | Backup | Off |
Off | Off | Off | Off | Off | Off | Off | Off | Off |
Before entering device sleep, one of the available sleep modes must be set. The device will automatically wake up in response to an interrupt being generated or upon any other sleep mode exit condition.
Some peripheral clocks will remain enabled during sleep, depending on their configuration. If desired, the modules can remain clocked during sleep to allow them continue to operate while other parts of the system are powered down to save power.