36.12 Register Summary

The register offsets shown below are with respect to Base Address = 0x4400_0000.

The PIC32CX-BZ3/PIC32CX-BZ36 12-bit High Speed SAR ADC module has the following Special Function Registers (SFRs):

Note: All registers in this table have corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See CLR, SET and INV Registers from Related Links.


Offset	Name	Bit Pos.	7	6	5	4	3	2	1	0
0x00 ... 0x13FF	Reserved
0x1400	ADCCON1	7:0		IRQVS[2:0]			STRGLVL
		15:8	ON	FRZ	SIDL	AIPMPEN	CVD_EN		FSYUPB	SCANEN
		23:16	FRACT	SELRES[1:0]		STRGSRC[4:0]
		31:24
0x1404 ... 0x140F	Reserved
0x1410	ADCCON2	7:0		ADCDIV[6:0]
		15:8	BGVRIEN	REFFLTIEN	EOSIEN
		23:16	SAMC[7:0]
		31:24	BGVRRDY	REFFLT	EOSRDY	CVD_CPL[2:0]			SAMC[9:8]
0x1414 ... 0x141F	Reserved
0x1420	ADCCON3	7:0	GLSWTRG	GSWTRG	ADINSEL[5:0]
		15:8	VREFSEL[2:0]			TRGSUSP	UPDIEN	UPDRDY	SAMP	RQCNVRT
		23:16	DIGEN7
		31:24	ADCSEL[1:0]		CONCLKDIV[5:0]
0x1424 ... 0x143F	Reserved
0x1440	ADCIMCON1	7:0	DIFF3	SIGN3	DIFF2	SIGN2	DIFF1	SIGN1	DIFF0	SIGN0
		15:8	DIFF7	SIGN7	DIFF6	SIGN6	DIFF5	SIGN5	DIFF4	SIGN4
		23:16	DIFF11	SIGN11	DIFF10	SIGN10	DIFF9	SIGN9	DIFF8	SIGN8
		31:24
0x1444 ... 0x147F	Reserved
0x1480	ADCGIRQEN1	7:0	AGIEN7	AGIEN6	AGIEN5	AGIEN4	AGIEN3	AGIEN2	AGIEN1	AGIEN0
		15:8					AGIEN11	AGIEN10	AGIEN9	AGIEN8
		23:16
		31:24
0x1484 ... 0x149F	Reserved
0x14A0	ADCCSS1	7:0	CSS7	CSS6	CSS5	CSS4	CSS3	CSS2	CSS1	CSS0
		15:8					CSS11	CSS10	CSS9	CSS8
		23:16
		31:24
0x14A4 ... 0x14BF	Reserved
0x14C0	ADCDSTAT1	7:0	ARDY7	ARDY6	ARDY5	ARDY4	ARDY3	ARDY2	ARDY1	ARDY0
		15:8					ARDY11	ARDY10	ARDY9	ARDY8
		23:16
		31:24
0x14C4 ... 0x14DF	Reserved
0x14E0	ADCCMPEN1	7:0	CMPEx[7:0]
		15:8					CMPEx[11:8]
		23:16
		31:24
0x14E4 ... 0x14EF	Reserved
0x14F0	ADCCMP1	7:0	DCMPLO[7:0]
		15:8	DCMPLO[15:8]
		23:16	DCMPHI[7:0]
		31:24	DCMPHI[15:8]
0x14F4 ... 0x14FF	Reserved
0x1500	ADCCMPEN2	7:0	CMPEx[7:0]
		15:8					CMPEx[11:8]
		23:16
		31:24
0x1504 ... 0x150F	Reserved
0x1510	ADCCMP2	7:0	DCMPLO[7:0]
		15:8	DCMPLO[15:8]
		23:16	DCMPHI[7:0]
		31:24	DCMPHI[15:8]
0x1514 ... 0x159F	Reserved
0x15A0	ADCFLTR1	7:0	FLTRDATA[7:0]
		15:8	FLTRDATA[15:8]
		23:16				CHNLID[4:0]
		31:24	AFEN	DATA16EN	DFMODE	OVRSAM[2:0]			AFGIEN	AFRDY
0x15A4 ... 0x15AF	Reserved
0x15B0	ADCFLTR2	7:0	FLTRDATA[7:0]
		15:8	FLTRDATA[15:8]
		23:16				CHNLID[4:0]
		31:24	AFEN	DATA16EN	DFMODE	OVRSAM[2:0]			AFGIEN	AFRDY
0x15B4 ... 0x15FF	Reserved
0x1600	ADCTRG1	7:0				TRGSRC0[4:0]
		15:8				TRGSRC1[4:0]
		23:16				TRGSRC2[4:0]
		31:24				TRGSRC3[4:0]
0x1604 ... 0x160F	Reserved
0x1610	ADCTRG2	7:0				TRGSRC4[4:0]
		15:8				TRGSRC5[4:0]
		23:16				TRGSRC6[4:0]
		31:24				TRGSRC7[4:0]
0x1614 ... 0x167F	Reserved
0x1680	ADCCMPCON1	7:0	ENDCMP	DCMPGIEN	DCMPED	IEBTWN	IEHIHI	IEHILO	IELOHI	IELOLO
		15:8				AINID[4:0]
		23:16	CVD_DATA[7:0]
		31:24	CVD_DATA[15:8]
0x1684 ... 0x168F	Reserved
0x1690	ADCCMPCON2	7:0	ENDCMP	DCMPGIEN	DCMPED	IEBTWN	IEHIHI	IEHILO	IELOHI	IELOLO
		15:8				AINID[4:0]
		23:16
		31:24
0x1694 ... 0x16FF	Reserved
0x1700	ADCBASE	7:0	ADCBASE[7:0]
		15:8	ADCBASE[15:8]
		23:16
		31:24
0x1704 ... 0x173F	Reserved
0x1740	ADCTRGSNS	7:0	LVL7	LVL6	LVL5	LVL4	LVL3	LVL2	LVL1	LVL0
		15:8
		23:16
		31:24
0x1744 ... 0x17FF	Reserved
0x1800	ADCANCON	7:0	ANEN7
		15:8	WKRDY7
		23:16	WKIEN7
		31:24					WKUPCLKCNT[3:0]
0x1804 ... 0x1AFF	Reserved
0x1B00	ADCSYSCFG0	7:0	AN[7:0]
		15:8
		23:16
		31:24
0x1B04 ... 0x1DFF	Reserved
0x1E00	ADCDATA0	7:0	DATA[7:0]
		15:8	DATA[15:8]
		23:16	DATA[23:16]
		31:24	DATA[31:24]
...
0x1E2C	ADCDATA11	7:0	DATA[7:0]
		15:8	DATA[15:8]
		23:16	DATA[23:16]
		31:24	DATA[31:24]