7 Appendix 3: DDR3L Configuration
(Ask a Question)For information about Rev E or later Kit DDR3L configurations, see Appendix 2 - DDR3 Configuration of AN4997: PolarFire FPGA Building a Mi-V Processor Subsystem.
For information about Rev E or later Kit DDR3L configurations, see Appendix 2 - DDR3 Configuration of AN4997: PolarFire FPGA Building a Mi-V Processor Subsystem.
The online versions of the documents are provided as a courtesy. Verify all content and data in the device’s PDF documentation found on the device product page.