12.5.7 Main Clock Timebase

Name: MCLKTIMEBASE
Offset: 0x06
Reset: 0x00

Bit 76543210 
    TIMEBASE[4:0] 
Access R/WR/WR/WR/WR/W 
Reset 00000 

Bits 4:0 – TIMEBASE[4:0] Timebase

This bit field selects the number of CLK_PER cycles to get a period equal to or larger than 1 μs, used for timing internal delays such as ADC start-up time.