39.4.1 Supply Voltage

Table 39-4. Supply Voltage
SymbolMin.Typ.Max.UnitsConditions
Supply Voltage(1)(2)
VDD

1.8

—

5.5

V

VDDIO2

1.62

—

5.5

V

SVDD——250V/ms1.8V < VDD < 5.5V
RAM Data Retention(3)
VDR

1.7

—

—

V

Device in Power-Down mode
Power-on Reset Release(4)
VPOR

—

1.6

—

V

BOD disabled(2)
tPOR

—

1

—

μs

BOD disabled(2)
Power-on Reset Rearm(4)
VPORR

—

1.25

—

V

BOD disabled(2)
tPORR

—

2.7

—

μs

BOD disabled(2)
VDD Slope to Ensure Internal Power-on Reset Signal(4)
SVDD0.05

—

—

V/msBOD disabled(2)
Note:
  1. During Chip Erase, the Brown-out Detector (BOD) configured with BODLEVEL0 is forced ON. If the supply voltage VDD is below VBOD for BODLEVEL0, the erase attempt will fail.
  2. Refer to section Reset Controller Specifications for BOD trip point information.
  3. This is the limit to which VDD can be lowered in sleep mode without losing RAM data.
  4. Refer to Figure 39-1.
Figure 39-1. POR and PORR with Slow Rising VDD
Note:
  • When POR is low, the device is held in Reset