1.4.2 MSS SGMII I/Os

The MSS SGMII I/Os are a dedicated set of pins. Two sets of pins are for transceiver and one set for sourcing the reference clock. The MSS SGMII pins are listed as follows:

  • MSS_SGMII_TXP0, MSS_SGMII_TXN0
  • MSS_SGMII_RXP0, MSS_SGMII_RXN0
  • MSS_SGMII_TXP1, MSS_SGMII_TXN1
  • MSS_SGMII_RXP1, MSS_SGMII_RXN1
  • MSS_REFCLK_IN_P, MSS_REFCLK_IN_N