13.18.8.8 Event User m

Name: USERm
Offset: 0x80 + m*0x04 [m=0..41]
Reset: 0x00000000
Property: PAC Write-Protection

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
   CHANNEL[5:0] 
Access R/WR/WR/WR/WR/WR/W 
Reset 000000 

Bits 5:0 – CHANNEL[5:0] Channel Event Selection

These bits are used to select the channel to connect to the event user.

Note that to select channel m, the value (m+1) must be written to the USER.CHANNEL bit group.

Value Channel Number
0x00 No channel output selected
0x01 0
0x02 1
0x03 2
0x04 3
0x05 4
0x06 5
0x07 6
0x08 7
0x09 8
0x0A 9
0x0B 10
0x0C 11
0x0D-0xFF Reserved
Table 13-52. User Multiplexer Number
USERm User Multiplexer Description Path Type
m = 0 PORT EV0 Event 0 Asynchronous, synchronous and resynchronized paths
m = 1 PORT EV1 Event 1 Asynchronous, synchronous and resynchronized paths
m = 2 PORT EV2 Event 2 Asynchronous, synchronous and resynchronized paths
m = 3 PORT EV3 Event 3 Asynchronous, synchronous and resynchronized paths
m = 4 DMAC CH0 Channel 0 Synchronous and resynchronized paths
m = 5 DMAC CH1 Channel 1 Synchronous and resynchronized paths
m = 6 DMAC CH2 Channel 2 Synchronous and resynchronized paths
m = 7 DMAC CH3 Channel 3 Synchronous and resynchronized paths
m = 8 DMAC CH4 Channel 4 Synchronous and resynchronized paths
m = 9 DMAC CH5 Channel 5 Synchronous and resynchronized paths
m = 10 DMAC CH6 Channel 6 Synchronous and resynchronized paths
m = 11 DMAC CH7 Channel 7 Synchronous and resynchronized paths
m = 12 TCC0 EV0 Asynchronous, synchronous and resynchronized paths
m = 13 TCC0 EV1 Asynchronous, synchronous and resynchronized paths
m = 14 TCC0 MC0 Match/Capture 0 Asynchronous, synchronous and resynchronized paths
m = 15 TCC0 MC1 Match/Capture 1 Asynchronous, synchronous and resynchronized paths
m = 16 TCC0 MC2 Match/Capture 2 Asynchronous, synchronous and resynchronized paths
m = 17 TCC0 MC3 Match/Capture 3 Asynchronous, synchronous and resynchronized paths
m = 18 TCC1 EV0 Asynchronous, synchronous and resynchronized paths
m = 19 TCC1 EV1 Asynchronous, synchronous and resynchronized paths
m = 20 TCC1 MC0 Match/Capture 0 Asynchronous, synchronous and resynchronized paths
m = 21 TCC1 MC1 Match/Capture 1 Asynchronous, synchronous and resynchronized paths
m = 22 TCC2 EV0 Asynchronous, synchronous and resynchronized paths
m = 23 TCC2 EV1 Asynchronous, synchronous and resynchronized paths
m = 24 TCC2 MC0 Match/Capture 0 Asynchronous, synchronous and resynchronized paths
m = 25 TCC2 MC1 Match/Capture 1 Asynchronous, synchronous and resynchronized paths
m = 26 TC0 Asynchronous, synchronous and resynchronized paths
m = 27 TC1 Asynchronous, synchronous and resynchronized paths
m = 28 Reserved
m = 29 Reserved
m = 30 TC4 Asynchronous, synchronous and resynchronized paths
m = 31 ADC START ADC start conversion Asynchronous, synchronous and resynchronized paths
m = 32 ADC SYNC Flush ADC Asynchronous, synchronous and resynchronized paths
m = 33 AC COMP0 Start comparator 0 Asynchronous, synchronous and resynchronized paths
m = 34 AC COMP1 Start comparator 1 Asynchronous, synchronous and resynchronized paths
m = 35 Reserved
m = 36 Reserved
m = 37 PTC STCONV PTC start conversion Asynchronous, synchronous and resynchronized paths
m = 38 CCL LUTIN 0 CCL input Asynchronous, synchronous and resynchronized paths
m = 39 CCL LUTIN 1 CCL input Asynchronous, synchronous and resynchronized paths
m = 40 CCL LUTIN 2 CCL input Asynchronous, synchronous and resynchronized paths
m = 41 CCL LUTIN 3 CCL input Asynchronous, synchronous and resynchronized paths
m = 42 Reserved
m = 43 MTB START Tracing start Asynchronous, synchronous and resynchronized paths
m = 44 MTB STOP Tracing stop Asynchronous, synchronous and resynchronized paths
others Reserved