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IEEE 802.15.4 Sub-GHz System-in-Package Datasheet
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14
Reference Guide - AT86RF212B
14.4
Module Description
14.4.2
Receiver (RX)
Introduction
Features
1
Description
2
Configuration Summary
3
Ordering Information
4
System Introduction
5
Pinout
6
Signal Description
Functional description of signals available at the package or routed in between the system dies.
7
I/O Multiplexing and Considerations
8
Power Supply and Start-Up Considerations
9
Product Mapping
10
Memories
11
Processor and Architecture
12
Application Schematic Introduction
13
Reference Guide - SAM L21
14
Reference Guide - AT86RF212B
14.1
Microcontroller Interface
14.2
Operating Modes
14.3
Functional Description
14.4
Module Description
14.4.1
Physical Layer Modes
14.4.2
Receiver (RX)
14.4.2.1
Overview
14.4.2.2
Frame Receive Procedure
14.4.2.3
Configuration
14.4.3
Transmitter (TX)
14.4.4
Frame Buffer
14.4.5
Voltage Regulators (AVREG, DVREG)
14.4.6
Battery Monitor (BATMON)
14.4.7
Crystal Oscillator (XOSC) and Clock Output (CLKM)
14.4.8
Frequency Synthesizer (PLL)
14.4.9
Automatic Filter Tuning (FTN)
14.5
Radio Transceiver Usage
14.6
Extended Feature Set
14.7
Register Summary
14.8
Register Description
14.9
Reset Values
15
Electrical Characteristics
16
Packaging Information
17
Schematic Checklist
18
Design Considerations
19
Conventions
20
Acronyms and Abbreviations
21
Continuous Transmission Test Mode
22
Errata
23
References
24
Document Revision History
The Microchip Website
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Microchip Devices Code Protection Feature
Legal Notice
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Worldwide Sales and Service
14.4.2 Receiver (RX)