14.4.2.3 Configuration

In Basic Operating Mode, the receiver is enabled by writing command RX_ON to the TRX_CMD bits in the TRX_STATE register (TRX_STATE.TRX_CMD) in states TRX_OFF or PLL_ON. In Extended Operating Mode, the receiver is enabled for RX_AACK operation from state PLL_ON by writing the command RX_AACK_ON.

There is no additional configuration required to receive IEEE 802.15.4 compliant frames in Basic Operating Mode. However, the frame reception in the AT86RF212B Extended Operating Mode requires further register configurations.

For specific applications, the receiver can additionaly be configured to handle critical environment to simplify the interaction with the microcontroller, or to operate in different data rates.

There are scenarios where CSMA-CA is not used before a transmission or where CSMA-CA is not really reliable, for example in hidden node scenarios. As two transceivers compete for the use of one channel they may interfere with each other which may produce unreliable transmission. Receiver Override can be used to cope with such scenarios. The level of interference (which can be caused by a new incoming frame) is continuously measured while decoding a frame. The synchronization to the potential new frame starts if the interference level does not allow for a reliable detection.

The AT86RF212B receiver has an outstanding sensitivity performance. At certain environmental conditions or for High Data Rate Modes it may be useful to manually decrease this sensitivity. This is achieved by adjusting the synchronization header detector threshold using register the RX_PDT_LEVEL bits in the RX_SYN register (RX_SYN.RX_PDT_LEVEL). Received signals with a RSSI value below the threshold do not activate the demodulation process.

Furthermore, at times it may be useful to protect a received frame against overwriting by a new subsequent data frame, when the receive data buffer has not been read on time. A Dynamic Frame Buffer Protection is enabled with the RX_SAFE_MODE bit in the TRX_CTRL_2 register (TRX_CTRL_2.RX_SAFE_MODE) set. The receiver remains in RX_ON or RX_AACK_ON state until the whole frame is uploaded by the microcontroller, indicated by pin 23 (/SEL) = H during the SPI Frame Receive Mode. The Frame Buffer content is only protected if the FCS is valid.

A Static Frame Buffer Protection is enabled with the RX_PDT_DIS bit in the RX_SYN register (RX_SYN.RX_PDT_DIS) set. The receiver remains in RX_ON or RX_AACK_ON state and no further SHR is detected until the register bit RX_PDT_DIS is set back.