14.1.3.1 Register Access Mode

Register Access Mode is used to read and write AT86RF212B registers (register address from 0x00 up to 0x3F).

A register access mode is a two-byte read/write operation initiated by /SEL = L. The first transferred byte on MOSI is the command byte including an identifier bit (bit[7] = 1), a read/write select bit (bit[6]), and a 6-bit register address.

On read access, the content of the selected register address is returned in the second byte on MISO.

Figure 14-4. Packet Structure - Register Read Access
Note: Each SPI access can be configured to return radio controller status information (PHY_STATUS) on MISO.

On write access, the second byte transferred on MOSI contains the write data to the selected address.

Figure 14-5. Packet Structure - Register Write Access

Each register access must be terminated by setting /SEL = H.

The figure below illustrates a typical SPI sequence for a register access sequence for write and read respectively.

Figure 14-6. Exemplary SPI Sequence – Register Access Mode