22.5.3.3 Sleep Mode Controller

Sleep mode is entered by executing the Wait For Interrupt instruction (WFI). The Sleep Mode bits in the Sleep Configuration register (SLEEPCFG.SLEEPMODE) select the level of the sleep mode.

Note: A small latency happens between the store instruction and actual writing of the SLEEPCFG register due to bridges. Software must ensure that the SLEEPCFG register reads the desired value before issuing a WFI instruction.
Note: After power-up, the MAINVREG low power mode takes some time to stabilize. Once stabilized, the SUPC->STATUS.ULPVREFRDY bit is set. Before entering Standby, software must ensure that the SUPC->STATUS.ULPVREFRDY bit is set.
Table 22-2. Sleep Mode Entry and Exit Table
ModeMode EntryWake-Up Sources
IDLESLEEPCFG.SLEEPMODE = IDLE
Synchronous (2) (APB, AHB), asynchronous (1)
STANDBYSLEEPCFG.SLEEPMODE = STANDBY
Synchronous(3), Asynchronous
OFFSLEEPCFG.SLEEPMODE = OFF
External Reset
Note:
  1. Asynchronous: interrupt generated on generic clock, external clock, or external event.
  2. Synchronous: interrupt generated on the APB clock.
  3. Synchronous interrupt only for peripherals configured to run in standby.
Note: The type of wake-up sources (synchronous or asynchronous) is given in each module interrupt section.

The sleep modes (idle, standby and off) and their effect on the clocks activity, the regulator and the NVM state are described in the table and the sections below. Refer to Power Domain Controller for the power domain gating effect.

Table 22-3. Sleep Mode Overview
ModeMain clockCPUAHBx and APBx clockGCLK clocksOscillators

VDDCORE

Regulator

VDDPLL

Regulator
NVM
ONDEMAND = 0ONDEMAND = 1
ActiveRunRunRunRun(3)RunRun if requestedMAINVREGON(4)active
IDLERunStopStop(1)Run(3)RunRun if requestedMAINVREGON(4)active
STANDBYStop(1)StopStop(1)Stop(1)Run if requested or RUNSTDBY=1Run if requestedMAINVREG in low power modeON(5)Ultra Low- power
OFFStopStopStopOFFOFFOFFOFFOFFOFF
Note:
  1. Running if requested by peripheral during SleepWalking.
  2. Running during SleepWalking.
  3. Following On-Demand Clock Request principle.
  4. Running if enabled (SUPC.VREGPLL.ENABLE = 1)
  5. Running if enabled (VREGPLL.ENABLE = 1) and allowed to run in Standby sleep mode: (SUPC.VREGPLL.RUNSTDBY = 1) or (SUPC.VREGPLL.RUNSTDBY = 0) and following the sleep walking request. SUPCVREG.RUNSTDBY must be set to allow VREGPLL running in Standby sleep mode. Refer to OSCCTRL module for details on oscillators behavior in STANDBY sleep mode.