39.9 Register Summary - 32-bit Mode

This Register Description section is valid if the TC is in 32-bit mode (CTRLA.MODE=2).

Refer to the Registers Description section for more details on register properties and access permissions.


Offset	Name	Bit Pos.	7	6	5	4	3	2	1	0
0x00	CTRLA	31:24				CAPTMODE1[1:0]			CAPTMODE0[1:0]
		23:16			COPEN1	COPEN0			CAPTEN1	CAPTEN0
		15:8					ALOCK	PRESCALER[2:0]
		7:0	ONDEMAND	RUNSTDBY	PRESCSYNC[1:0]		MODE[1:0]		ENABLE	SWRST
0x04	CTRLBCLR	7:0	CMD[2:0]					ONESHOT	LUPD	DIR
0x05	CTRLBSET	7:0	CMD[2:0]					ONESHOT	LUPD	DIR
0x06	EVCTRL	15:8			MCEO1	MCEO0				OVFEO
0x06	EVCTRL	7:0			TCEI	TCINV		EVACT[2:0]
0x08	INTENCLR	7:0			MC1	MC0			ERR	OVF
0x09	INTENSET	7:0			MC1	MC0			ERR	OVF
0x0A	INTFLAG	7:0			MC1	MC0			ERR	OVF
0x0B	STATUS	7:0			CCBUFV1	CCBUFV0	PERBUFV		SLAVE	STOP
0x0C	WAVE	7:0							WAVEGEN[1:0]
0x0D	DRVCTRL	7:0							INVEN1	INVEN0
0x0E	Reserved
0x0F	DBGCTRL	7:0								DBGRUN
0x10	SYNCBUSY	31:24
		23:16
		15:8
		7:0	CC1	CC0	PER	COUNT	STATUS	CTRLB	ENABLE	SWRST
0x14	COUNT	31:24	COUNT[31:24]
		23:16	COUNT[23:16]
		15:8	COUNT[15:8]
		7:0	COUNT[7:0]
0x18	PER	31:24	PER[31:24]
		23:16	PER[23:16]
		15:8	PER[15:8]
		7:0	PER[7:0]
0x1C	CC0	31:24	CC[31:24]
		23:16	CC[23:16]
		15:8	CC[15:8]
		7:0	CC[7:0]
0x20	CC1	31:24	CC[31:24]
		23:16	CC[23:16]
		15:8	CC[15:8]
		7:0	CC[7:0]
0x24 ... 0x2B	Reserved
0x2C	PERBUF	31:24	PERBUF[31:24]
		23:16	PERBUF[23:16]
		15:8	PERBUF[15:8]
		7:0	PERBUF[7:0]
0x30	CCBUF0	31:24	CCBUF[31:24]
		23:16	CCBUF[23:16]
		15:8	CCBUF[15:8]
		7:0	CCBUF[7:0]
0x34	CCBUF1	31:24	CCBUF[31:24]
		23:16	CCBUF[23:16]
		15:8	CCBUF[15:8]
		7:0	CCBUF[7:0]

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