37.2.4.3.1 Transition Bit (T-Bit)

Unlike I2C, where the ninth data bit represents ACK/NACK, the ninth data bit in an I3C SDR Data Word is a Transition Bit (T-bit).

When the Controller is writing data to the Target, the ninth data bit (T-bit) of each SDR Data Word is a Parity bit calculated using odd parity, which is helpful in detecting noise-caused errors on the bus. The value of this Parity bit is the XOR of each of the eight data bits with ‘1’. Figure 37-13 shows an example Write Data Word from the Controller with the Parity T-bit included.

Important: Since I3C Write Data Word does not have an ACK/NACK bit, there is no way for the Target to notify the Controller when it cannot receive any more data, although there are internal flags in the Target that are set to identify such errors. To mitigate this, the I3C specification includes special SETMRL/GETMRL and SETMWL/GETMWL Common Command Codes (CCC) to set maximum read and write lengths and notify the Target ahead of time.
Figure 37-13. Example Write Data Word for Controller to Target Communication (Example Data: 0x96)
When the Controller is reading data returned from the Target, the ninth data bit (T-bit) of each SDR Data Word represents the End-of-Data bit. Unlike I2C, where a target device does not have control over the number of data words it sends, the Target uses this bit in I3C to control the number of data words it returns, and it also lets the Controller abort the read prematurely when necessary. To end the message, the Target can return the ninth T-Bit as ‘0’. To continue the message, the Target returns the ninth T-Bit as ‘1’ and monitors the SDA line. If the SDA line remains high on the next falling SCL edge, the Target continues to send the next data value. If the SDA line is low on the next falling SCL edge (Restart), then the Controller has aborted the data transfer and the Target module does not send the next data. This condition can be monitored using the RSCIF flag.

Figure 37-14 shows an example Read Data Word from the Target where the End-of-Data bit is asserted by the Target. Figure 37-15 shows an example Read Data Word from the Target where the Controller aborts the transaction by asserting the End-of-Data bit.

Important: For the Target module to send an End-of-Data T-bit = 1, the user must write the next byte to I3CxTXB Transmit Buffer before the Transmit FIFO becomes empty. The Target module responds with an End-of-Data T-bit = 0 as soon as the Transmit FIFO becomes empty. This applies to Private Read Transactions and while sending the IBI Payload.
Figure 37-14. Example Read Data Words for Target to Controller Communication with End-of-Data Asserted by the Target (Example Data: 0x96 and 0xD4)
Figure 37-15. Example Read Data Words for Target to Controller Communication with End-of-Data Asserted by the Controller (Example Data:0x96 and 0xD4)