14.12.9 SCANHADR

Scan High Address Register

Note:

Registers SCANHADRU/H/L form a 22-bit value but are not guarded for atomic or asynchronous access; registers may only be read or written while SCANGO = 0.
While SCANGO = 1, writing to this register is ignored.

Name:	SCANHADR
Offset:	0xF4C
Reset:	0


Bit	23	22	21	20	19	18	17	16
			SCANHADRU[5:0]
Access			R/W	R/W	R/W	R/W	R/W	R/W
Reset			1	1	1	1	1	1


Bit	15	14	13	12	11	10	9	8
	SCANHADRH[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	1	1	1	1	1	1	1	1


Bit	7	6	5	4	3	2	1	0
	SCANHADRL[7:0]
Access	R/W	R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset	1	1	1	1	1	1	1	1

Bits 21:16 – SCANHADRU[5:0] Scan End Address bits

Upper bits of the address at the end of the designated scan

Bits 15:8 – SCANHADRH[7:0] Scan End Address bits

High byte of the address at the end of the designated scan

Bits 7:0 – SCANHADRL[7:0] Scan End Address bits

Low byte of the address at the end of the designated scan

Registers SCANHADRU/H/L form a 22-bit value but are not guarded for atomic or asynchronous access; registers may only be read or written while SCANGO Scanner GO bit(2, 3) = 0. While SCANGO Scanner GO bit(2, 3) = 1, writing to this register is ignored.