Introduction
1 Definitions, Acronyms and Abbreviations
2 Overall Description
3 Metrology Interface Definition
- 3.1 Metrology Control Registers
- 3.2 Metrology Status Registers
  - 3.2.1 Metrology Firmware Version
    Metrology Firmware Version
  - 3.2.2 Metrology Status Register
    Metrology Status Register
  - 3.2.3 Metrology State Flags Register
    Metrology State Flags Register
  - 3.2.4 Waveform Capture Function Status
    Waveform Capture Function Status
  - 3.2.5 Measurement Interval Number
    Measurement Interval Number
  - 3.2.6 Number of Samples in the Last Measurement Interval
    Number of Samples in the Last Measurement Interval
  - 3.2.7 Phase Correction Filter Offset
    Phase Correction Filter Offset
  - 3.2.8 Dominant Line Voltage Fundamental Harmonic Frequency
    Dominant Line Voltage Fundamental Harmonic Frequency
  - 3.2.9 Line Voltage Fundamental Harmonic Frequency
    Line Voltage Fundamental Harmonic Frequency
  - 3.2.10 Sensor Temperature
    Sensor Temperature
  - 3.2.11 Phase Current Peak Registers
    Phase Current Peak Registers
  - 3.2.12 Neutral Current Peak Registers
    Neutral Current Peak Registers
  - 3.2.13 Voltage Peak Registers
    Voltage Peak Registers
  - 3.2.14 Compiled Feature Indicator Bits
    Compiled Feature Indicator Bits
  - 3.2.15 Pulse counters
    Pulse counters
  - 3.2.16 Zero-Crossing Sample Number of Phase-X Voltage
    Zero-Crossing Sample Number of Phase-X Voltage
  - 3.2.17 ATSENSE Calibration Trim Data, Registers: 0x41 – 0x44
    ATSENSE Calibration Trim Data, Registers: 0x41 – 0x44
  - 3.2.18 ATSENSE Calibration Trim Data, Registers: 0x45 – 0x48
    ATSENSE Calibration Trim Data, Registers: 0x45 – 0x48
- 3.3 Accumulated Output Quantities
- 3.4 Harmonic Analysis Output Quantities
- 3.5 Derived Output Quantities
4 Interface between Metrology and Application
5 Annex. Meter Forms
The service type determines what meter form is being implemented and how the Metrology DSP core interprets and processes the ADC values.
6 References
7 Revision History
Microchip Information

3.2.14 Compiled Feature Indicator Bits

Name:	FEATURES
Property:	Read


Bit	31	30	29	28	27	26	25	24
	POLY_PHASE	SINGLE_PHASE				RCZ_OUT		Fs_SAMPLE_RATE
Access	R	R				R		R
Reset	0	0				0		0


Bit	23	22	21	20	19	18	17	16
		ATSense_LOC	NUM_PULSES[1:0]		ROGOWSKI_DC_REMOVE	CAPTURE	CREEP	DFT_ENABLED
Access		R	R	R	R	R	R	R
Reset		0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	CORE_CLK_SPEED[3:0]				RZC_DETECT	PQ_OFFSET_X	I_N_MUXING	HALF_COPROC_CLK
Access	R	R	R	R	R	R	R	R
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
								DEBUG_MODES
Access								R
Reset								0

Bit 31 – POLY_PHASE Flag

Value	Description
1	Compiled: Poly-phase metering enabled.

Bit 30 – SINGLE_PHASE Flag

Value	Description
1	Compiled: Single-phase metering enabled.

Bit 26 – RCZ_OUT Flag

Value	Description
1	Compiled: Detect independent V_A raw zero-crossings and output signal on pin PD19 Note: Not compatible with NUM_PULSES = 3

Bit 24 – Fs_SAMPLE_RATE

Metrology baseband sample rate

Value	Description
0	Baseband sample rate FS = 4000 KHz
1	Baseband sample rate FS = 8000 KHz

Bit 22 – ATSense_LOC

Value	Description
0	PIC32CXMTSH, Internal ATSense detected (ATsense203)
1	PIC32CXMTC, External ATSense detected (ATSense301)

Bits 21:20 – NUM_PULSES[1:0]

Metrology may be compiled with different number of pulses enabled, [0-3].

NUM_PULSES equals the number of pulses enabled during compile time.

Bit 19 – ROGOWSKI_DC_REMOVE Flag

Value	Description
1	Compiled for DC-removal before integrator filter when using Rogowski coil current sensors

Bit 18 – CAPTURE Flag

Value	Description
1	Compiled for waveform capture

Bit 17 – CREEP Flag

Value	Description
1	Compiled for CREEP thresholding

Bit 16 – DFT_ENABLED Flag

Value	Description
1	Compiled for DFT harmonic analysis

Bits 15:12 – CORE_CLK_SPEED[3:0]

Core-1 (Metrology core) clock fixed at 237.568 MHz in PIC32CXMTxx metrology

Value	Description
0x0	Compiled to be used with Core-0 clock = undefined
0x1	Compiled to be used with Core-0 clock = 102.400 MHz
0x2	Compiled to be used with Core-0 clock = 106.496 MHz
0x3	Compiled to be used with Core-0 clock = 110.592 MHz
0x4	Compiled to be used with Core-0 clock = 114.688 MHz
0x5	Compiled to be used with Core-0 clock = 118.784 MHz
0x6	Compiled to be used with Core-0 clock = 237.568 MHz
0x7	Reserved

Bit 11 – RZC_DETECT Flag

Value	Description
1	Compiled for raw zero-cross detect

Bit 10 – PQ_OFFSET_X Flag

Value	Description
1	Compiled for use of PQ per-phase offsets

Bit 9 – I_N_MUXING Flag

Value	Description
1	Compiled for near-full bandwidth I_Neutral metrology

Bit 8 – HALF_COPROC_CLK Flag

Value	Description
1	Compiled for Core1 coprocessor to run at half speed of Core0

Bit 0 – DEBUG_MODES

Value	Description
0	Unless specifically compiled for a debug mode, this bit is always = 0
1	Metrology FW compiled in a DEBUG mode

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