Introduction
1 Definitions, Acronyms and Abbreviations
2 Overall Description
3 Metrology Interface Definition
- 3.1 Metrology Control Registers
- 3.2 Metrology Status Registers
  - 3.2.1 Metrology Firmware Version
    Metrology Firmware Version
  - 3.2.2 Metrology Status Register
    Metrology Status Register
  - 3.2.3 Metrology State Flags Register
    Metrology State Flags Register
  - 3.2.4 Waveform Capture Function Status
    Waveform Capture Function Status
  - 3.2.5 Measurement Interval Number
    Measurement Interval Number
  - 3.2.6 Number of Samples in the Last Measurement Interval
    Number of Samples in the Last Measurement Interval
  - 3.2.7 Phase Correction Filter Offset
    Phase Correction Filter Offset
  - 3.2.8 Dominant Line Voltage Fundamental Harmonic Frequency
    Dominant Line Voltage Fundamental Harmonic Frequency
  - 3.2.9 Line Voltage Fundamental Harmonic Frequency
    Line Voltage Fundamental Harmonic Frequency
  - 3.2.10 Sensor Temperature
    Sensor Temperature
  - 3.2.11 Phase Current Peak Registers
    Phase Current Peak Registers
  - 3.2.12 Neutral Current Peak Registers
    Neutral Current Peak Registers
  - 3.2.13 Voltage Peak Registers
    Voltage Peak Registers
  - 3.2.14 Compiled Feature Indicator Bits
    Compiled Feature Indicator Bits
  - 3.2.15 Pulse counters
    Pulse counters
  - 3.2.16 Zero-Crossing Sample Number of Phase-X Voltage
    Zero-Crossing Sample Number of Phase-X Voltage
  - 3.2.17 ATSENSE Calibration Trim Data, Registers: 0x41 – 0x44
    ATSENSE Calibration Trim Data, Registers: 0x41 – 0x44
  - 3.2.18 ATSENSE Calibration Trim Data, Registers: 0x45 – 0x48
    ATSENSE Calibration Trim Data, Registers: 0x45 – 0x48
- 3.3 Accumulated Output Quantities
- 3.4 Harmonic Analysis Output Quantities
- 3.5 Derived Output Quantities
4 Interface between Metrology and Application
5 Annex. Meter Forms
The service type determines what meter form is being implemented and how the Metrology DSP core interprets and processes the ADC values.
6 References
7 Revision History
Microchip Information

3.2.8 Dominant Line Voltage Fundamental Harmonic Frequency

Name:	FREQ
Property:	Read


Bit	31	30	29	28	27	26	25	24
	FREQ[31:24]
Access	R	R	R	R	R	R	R	R
Reset	0	0	0	0	0	0	0	0


Bit	23	22	21	20	19	18	17	16
	FREQ[23:16]
Access	R	R	R	R	R	R	R	R
Reset	0	0	0	0	0	0	0	0


Bit	15	14	13	12	11	10	9	8
	FREQ[15:8]
Access	R	R	R	R	R	R	R	R
Reset	0	0	0	0	0	0	0	0


Bit	7	6	5	4	3	2	1	0
	FREQ[7:0]
Access	R	R	R	R	R	R	R	R
Reset	0	0	0	0	0	0	0	0

Bits 31:0 – FREQ[31:0] Frequency of Fundamental Harmonic (uQ20.12)

Frequency of the line voltage fundamental harmonic component is determined by the Metrology module and provided in the variable FREQ, using the dominant phase. In addition, a separate frequency is determined for each individual voltage phase, for each of three phases, x = [A, B, C].

Note: Maximum accuracy in frequency measurement is achieved at the end of the integration period. Therefore, the register should be read immediately after the integration interrupt is generated. However, since this register is updated each time a positive zero-crossing in the voltage line is detected, it is possible to read the register after the full cycle interrupt, enabling a faster refresh of the value.