30.5.10 Control F
| Name: | CTRLF |
| Offset: | 0x09 |
| Reset: | 0x00 |
| Property: | - |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| FREERUN | LEFTADJ | SAMPNUM[3:0] | |||||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
Bit 5 – FREERUN Free-Running
This bit controls whether the ADC Free-Running mode is enabled or not.
Note: Free-Running mode is not supported in Series mode.
| Value | Description |
|---|---|
| 0 | The ADC Free-Running mode is disabled |
| 1 | The ADC Free-Running mode is enabled. A new conversion is started as soon as the previous conversion or accumulation has completed. |
Bit 4 – LEFTADJ Left Adjust
This bit controls whether the ADC output is left adjusted or not.
| Value | Description |
|---|---|
| 0 | The ADC output left adjustment is disabled |
| 1 | The ADC output left adjustment is enabled |
Bits 3:0 – SAMPNUM[3:0] Sample Accumulation Number Select
This bit field controls the number of consecutive ADC samples that are accumulated automatically into the ADC Result (ADCn.RESULT) register. The most recent sample will be available in the ADC Sample (ADCn.SAMPLE) register.
| Value | Name | Description |
|---|---|---|
| 0x0 | NONE | No accumulation, single sample per conversion result |
| 0x1 | ACC2 | 2 samples accumulated |
| 0x2 | ACC4 | 4 samples accumulated |
| 0x3 | ACC8 | 8 samples accumulated |
| 0x4 | ACC16 | 16 samples accumulated |
| 0x5 | ACC32 | 32 samples accumulated |
| 0x6 | ACC64 | 64 samples accumulated |
| 0x7 | ACC128 | 128 samples accumulated |
| 0x8 | ACC256 | 256 samples accumulated |
| 0x9 | ACC512 | 512 samples accumulated |
| 0xA | ACC1024 | 1024 samples accumulated |
| Other | - | Reserved |