30.5.13 Positive Input Multiplexer

Name: MUXPOS
Offset: 0x0C
Reset: 0x00
Property: -

Bit 76543210 
 VIA[1:0]MUXPOS[5:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset 00000000 

Bits 7:6 – VIA[1:0]

This bit field controls how the analog input is connected to the ADC input.
Note: The VIA bits in MUXPOS and MUXNEG are shared, so a value written to the VIA bit field in one of the two registers is updated in both. It is, therefore, not possible to have one input using the PGA and the other not using the PGA.
ValueNameDescription
0x0DIRECTInput connected directly to the ADC
0x1PGAInput connected to the ADC via the PGA
Other-Reserved

Bits 5:0 – MUXPOS[5:0] Positive Input Multiplexer

This bit field controls which analog input is connected to the positive input of the ADC/PGA. Changing this setting may require some settling time. Refer to the Electrical Characteristics section for further details.

ValueNameDescription
0x00DEFAULTInternal ground
0x01-0x0FAIN1-AIN15ADC input pin 1-15
0x30GNDInternal ground
0x31VDDDIV10VDD divided by 10
0x32TEMPSENSETemperature sensor
0x33DACREF0DACREF from AC0
Other-Reserved