30.5.13 Positive Input Multiplexer
Name: | MUXPOS |
Offset: | 0x0C |
Reset: | 0x00 |
Property: | - |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
VIA[1:0] | MUXPOS[5:0] | ||||||||
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 7:6 – VIA[1:0]
Note: The VIA
bits in MUXPOS and MUXNEG are shared, so a value written to the VIA bit field in
one of the two registers is updated in both. It is, therefore, not possible to
have one input using the PGA and the other not using the
PGA.
Value | Name | Description |
---|---|---|
0x0 | DIRECT | Input connected directly to the ADC |
0x1 | PGA | Input connected to the ADC via the PGA |
Other | - | Reserved |
Bits 5:0 – MUXPOS[5:0] Positive Input Multiplexer
This bit field controls which analog input is connected to the positive input of the ADC/PGA. Changing this setting may require some settling time. Refer to the Electrical Characteristics section for further details.
Value | Name | Description |
---|---|---|
0x00 | DEFAULT | Internal ground |
0x01-0x0F | AIN1-AIN15 | ADC input pin 1-15 |
0x30 | GND | Internal ground |
0x31 | VDDDIV10 | VDD divided by 10 |
0x32 | TEMPSENSE | Temperature sensor |
0x33 | DACREF0 | DACREF from AC0 |
Other | - | Reserved |