2.4 Operating Modes Overview

This section gives an overview of the operating modes supported by the ATA8510/15, as shown in the following figure. For a more detailed description of the operating modes and their transitions, see later sections.
Figure 2-8. Operating Modes Overview

After connecting the supply voltage to the VS pin, the ATA8510/15 always starts in OFFMode. All internal circuits are disconnected from the power supply. Therefore, no SPI communication is supported. The ATA8510/15 can be woken up by activating the PWRON pin or one of the NPWRONx pins. This triggers the power-on sequence. After the system initialization, the ATA8510/15 reaches the IDLEMode.

The IDLEMode is the basic system mode supporting the SPI communication and transitions to all other operating modes. There are two options of the IDLEMode requiring configuration in the EEPROM settings:

  • IDLEMode(RC) with low power consumption using the fast RC (FRC) oscillator for processing
  • IDLEMode(XTO) with active crystal oscillator for high accuracy clock output or timing measurements

The transmit mode (TXMode) enables data transmission using the selected service/channel configurations. It is usually enabled by the SPI command “Set System Mode” as described in SPI Command Reference, or directly after power-on, when selected in the EEPROM setting.

The receive mode (RXMode) provides data reception on the selected service/channel configuration. The precondition for data reception is a valid preamble. The receiver continuously scans for a valid telegram and receives the data if all pre-configured checks are successful. The RXMode is usually enabled by the SPI command “Set System Mode”, as described in SPI Command Reference, or directly after power-on when selected in the EEPROM setting.

In PollingMode, the receiver is activated for a short period of time to check for a valid telegram on the selected service/channel configurations. The receiver is deactivated if no valid telegram is found and a sleep period with very low power consumption elapses. This process is repeated periodically in accordance with the polling configuration. The initial settings are stored in the EEPROM and copied during firmware initialization to the SRAM. This allows modification of the PollingMode timing and service/channel configuration during IDLEMode.

The tune and check mode (TCMode) offers a calibration and self-checking functionality for the VCO and FRC oscillators as well as for antenna tuning, temperature measurement and polling cycle accuracy. This mode is activated via the SPI command “Calibrate and Check”, described in SPI Command Reference. When selected in the EEPROM settings, tune and check tasks are also used during the system initialization after the power-on. Furthermore, they can also be activated periodically during PollingMode.

The following table shows the relations between the operating modes and their corresponding power supplies, clock sources and sleep mode settings.

Table 2-2.  Operating Modes versus Power Supplies and Oscillators

Operation Mode

AVR® Sleep Mode

DVCC

AVCC

VS_PA

XTO

SRC

FRC

OFFMode

off

off

off

off

off

off

IDLEMode(RC)

Active mode

Power-down(1)

on

off

off

off

off

off

off

on

on

on

off

IDLEMode(XTO)

Active mode

Power-down(1)

on

on

off

off

on

on

on

on

off

off

TXMode

Active mode

on

on(2)

on

on

off

RXMode

Active mode

on

off

on

on

off

PollingMode(RC)

  • Active period
  • Sleep period

Active mode

Power-down(1)

on

off

off

off

on

off

on

on

on

off

PollingMode(XTO)

  • Active period
  • Sleep period

Active mode

Power-down(1)

on

on

off

off

on

on

on

on

off

off

Note:
  1. During IDLEMode(RC) and IDLEMode(XTO), the AVR microcontroller enters sleep mode to reduce current consumption. The sleep mode of the microcontroller section can be defined in the EEPROM. The power-down mode is recommended for keeping current consumption low.
  2. Only activated in the 5V application when the bit VS5V is set (see sysConfig register). This is selectable in the EEPROM setting. (For more information, see EEPROM Configuration.)