3.11.5 AVCC Voltage Supervision

The AVCC voltage is enabled by the AVEN bit in the SUPCR register. Two thresholds are defined for the AVCC voltage supervision:

  • Th_rst_avcc_n – Indicates that the voltage is below the safe operating voltage range of the digital circuits
  • Th_avcc_low – Indicates that the voltage is below the safe operating voltage of the analog RF front end and XTO circuits

The reset circuits are used to allow proper operation of the analog and digital portion of the RF front end and XTO. Both thresholds have a hysteresis of at least 10 mV.

A typical AVCC power-up sequence displays in the following figure. The battery voltage, VS, is applied and the AVR is ready for operation. The SUPCR.AVEN signal is set by firmware and the AVCC voltage starts ramping up. When the reset threshold Th_rst_avcc_n is reached, the AVCC reset is set and the RF front end and XTO configuration via the internal front-end control can be started. The analog circuits are ready to be enabled when the Th_avcc_low threshold is reached.

Figure 3-107. AVCC Power-Up Sequence

The firmware activates all front-end blocks in a way that no undesired AVCC voltage drop occurs. In case of a weak battery, the AVCC voltage might drop below the Th_avcc_low threshold during operation, as shown in the following figure. The AVCC low interrupt flag AVCCLF in the SUPFR byte is set by the AVCC_LOW signal. This indicates that RF front-end transmit operations must be stopped immediately because the analog circuits are operating outside the specified voltage range and undesired radiation outside of the desired frequency band is avoided.

Figure 3-108. AVCC Drop During Operation and Violating Low Threshold

If the SUPCR.AVEN bit is cleared, a RST_AVCC_N and AVCC_LOW indication occurs even if the AVCC voltage does not drop below the reset threshold, as depicted at the first falling edge of AVEN in the following figure. This ensures a reliable reset each time the AVCC is turned off. The reset circuit reliably maintains a minimum pulse width RST_AVCC_min_width at RST_AVCC_N and AVCC_LOW. The AVCC reset interrupt flag (AVCCRF) in the SUPFR is set by the RST_AVCC_N signal.

Figure 3-109. RST_AVCC and AVCC_LOW Controlled by AVEN