29.2 Features

  • Interface for configuring into one of the following:

    • Inter-Integrated Circuit (I2C) Two-wire Serial Interface
    • System Management Bus (SMBus™) compatible
    • Serial Peripheral Interface (SPI)
    • Universal Synchronous/Asynchronous Receiver/Transmitter (USART)
  • Single transmit buffer and double receive buffer
  • Baud-rate generator
  • Address match/mask logic
  • Operational in all Sleep modes with an external clock source
  • Can be used with DMA
For further information, see the following chapters: