25.7.13 Debouncer Prescaler


Bit	31	30	29	28	27	26	25	24

Access
Reset


Bit	23	22	21	20	19	18	17	16
								TICKON
Access								RW
Reset								0


Bit	15	14	13	12	11	10	9	8

Access
Reset


Bit	7	6	5	4	3	2	1	0
	STATES1	PRESCALER1[2:0]			STATES0	PRESCALER0[2:0]
Access	RW	RW	RW	RW	RW	RW	RW	RW
Reset	0	0	0	0	0	0	0	0

Bit 16 – TICKON Pin Sampler frequency selection

This bit selects the clock used for the sampling of bounce during transition detection.

Value	Description
0	The bounce sampler is using GCLK_EIC.
1	The bounce sampler is using the low frequency clock.

Bit 7 – STATES1 Debouncer number of states 1

This bit selects the number of samples by the debouncer low frequency clock needed to validate a transition from current pin state to next pin state in synchronous debouncing mode for pins EXTINT[15:8].

Value	Description
0	The number of low frequency samples is 3.
1	The number of low frequency samples is 7.

Bits 6:4 – PRESCALER1[2:0] Debouncer Prescaler 1

These bits select the debouncer low frequency clock for pins EXTINT[15:8].

Value	Name	Description
0x0	DIV2	EIC clock divided by 2
0x1	DIV4	EIC clock divided by 4
0x2	DIV8	EIC clock divided by 8
0x3	DIV16	EIC clock divided by 16
0x4	DIV32	EIC clock divided by 32
0x5	DIV64	EIC clock divided by 64
0x6	DIV128	EIC clock divided by 128
0x7	DIV256	EIC clock divided by 256

Bit 3 – STATES0 Debouncer number of states 0

This bit selects the number of samples by the debouncer low frequency clock needed to validate a transition from current pin state to next pin state in synchronous debouncing mode for pins EXTINT[7:0].

Value	Description
0	The number of low frequency samples is 3.
1	The number of low frequency samples is 7.

Bits 2:0 – PRESCALER0[2:0] Debouncer Prescaler 0

These bits select the debouncer low frequency clock for pins EXTINT[7:0].

Value	Name	Description
0x0	DIV2	EIC clock divided by 2
0x1	DIV4	EIC clock divided by 4
0x2	DIV8	EIC clock divided by 8
0x3	DIV16	EIC clock divided by 16
0x4	DIV32	EIC clock divided by 32
0x5	DIV64	EIC clock divided by 64
0x6	DIV128	EIC clock divided by 128
0x7	DIV256	EIC clock divided by 256

Name:	DPRESCALER
Offset:	0x34
Reset:	0x00000000
Property:	PAC Write-Protection, Enable-Protected