4.1 32-pin VQFN and 32-pin TQFP


32-pin TQFP and VQFN (Top View)
PIC32CM5164JH00032 PIC32CM2532JH00032 PIC32CM5164JH01032 PIC32CM2532JH01032 PIC32CM1216JH01032	Figure 4-1. TQFP
PIC32CM1216JH01032	Figure 4-2. VQFN

Note:

The 32-pin VQFN package has wettable flanks.

Table 4-1. 32-pin TQFP
Pin number	Pin Name	Peripheral Functions															Supply	Reset state
		A	B					C	D	E	F	G	H	I	J	K
		EIC	REF	ADCO	ADC1	AC	DAC	SERCOM	SERCOM	TC/TCC	TC/TCC	CAN (1), PDEC	AC, GCLK	CCL	PDEC	PTC
1	PA00, XIN32	EXTINT[0]							SERCOM1/PAD[0]	TCC2/WO[0]	TC7/WO[0]		CMP[2]				AVDD	I/O, HI-Z
2	PA01, XOUT32	EXTINT[1]							SERCOM1/PAD[1]	TCC2/WO[1]	TC7/WO[1]		CMP[3]				AVDD	I/O, HI-Z
3	PA02	EXTINT[2]		AIN[0]		AIN[4]	VOUT									Y[0], DS[0]	AVDD	I/O, HI-Z
4	PA03	EXTINT[3]	VREFA	AIN[1]		AIN[5]										Y[1], DS[1]	AVDD	I/O, HI-Z
5	PA04	EXTINT[4]		AIN[4]		AIN[0]			SERCOM0/PAD[0]	TCC0/WO[0]	TC5/WO[0]			IN[0]		Y[2], DS[2]	AVDD	I/O, HI-Z
6	PA05	EXTINT[5]		AIN[5]		AIN[1]			SERCOM0/PAD[1]	TCC0/WO[1]	TC5/WO[1]			IN[1]		Y[3], DS[3]	AVDD	I/O, HI-Z
7	PA06	EXTINT[6]		AIN[6]		AIN[2]			SERCOM0/PAD[2]	TCC1/WO[0]	TC6/WO[0]			IN[2]		Y[4], DS[4]	AVDD	I/O, HI-Z
8	PA07	EXTINT[7]		AIN[7]		AIN[3]			SERCOM0/PAD[3]	TCC1/WO[1]	TC6/WO[1]			OUT[0]		Y[5], DS[5]	AVDD	I/O, HI-Z
9	AVDD
10	AVSS
11	PA08	NMI		AIN[8]	AIN[10]			SERCOM0/PAD[0]	SERCOM2/PAD[0]	TCC0/WO[0]	TCC1/WO[2]			IN[3]	QDI[0]	X[0], Y[16], DS[16]	VDDIO	I/O, HI-Z
12	PA09	EXTINT[9]		AIN[9]	AIN[11]			SERCOM0/PAD[1]	SERCOM2/PAD[1]	TCC0/WO[1]	TCC1/WO[3]			IN[4]	QDI[1]	X[1], Y[17], DS[17]	VDDIO	I/O, HI-Z
13	PA10	EXTINT[10]		AIN[10]				SERCOM0/PAD[2]	SERCOM2/PAD[2]	TCC1/WO[0]	TCC0/WO[2]		GCLK/IO[4]	IN[5]	QDI[2]	X[2], Y[18], DS[18]	VDDIO	I/O, HI-Z
14	PA11	EXTINT[11]		AIN[11]				SERCOM0/PAD[3]	SERCOM2/PAD[3]	TCC1/WO[1]	TCC0/WO[3]		GCLK/IO[5]	OUT[1]		X[3], Y[19], DS[19]	VDDIO	I/O, HI-Z
15	PA14, XIN	EXTINT[14]						SERCOM2/PAD[2]	SERCOM4/PAD[2]	TC4/WO[0]	TCC0/WO[4]		GCLK/IO[0]				VDDIO	I/O, HI-Z
16	PA15, XOUT	EXTINT[15]						SERCOM2/PAD[3]	SERCOM4/PAD[3]	TC4/WO[1]	TCC0/WO[5]		GCLK/IO[1]				VDDIO	I/O, HI-Z
17	PA16	EXTINT[0]						SERCOM1/PAD[0]	SERCOM3/PAD[0]	TCC2/WO[0]	TCC0/WO[6]	QDI[0]	GCLK/IO[2]	IN[0]		X[4], Y[20], DS[20]	VDDIO	I/O, HI-Z
18	PA17	EXTINT[1]						SERCOM1/PAD[1]	SERCOM3/PAD[1]	TCC2/WO[1]	TCC0/WO[7]	QDI[1]	GCLK/IO[3]	IN[1]		X[5], Y[21], DS[21]	VDDIO	I/O, HI-Z
19	PA18	EXTINT[2]						SERCOM1/PAD[2]	SERCOM3/PAD[2]	TC4/WO[0]	TCC0/WO[2]	QDI[2]	CMP[0]	IN[2]		X[6], Y[22], DS[22]	VDDIO	I/O, HI-Z
20	PA19	EXTINT[3]						SERCOM1/PAD[3]	SERCOM3/PAD[3]	TC4/WO[1]	TCC0/WO[3]		CMP[1]	OUT[0]		X[7], Y[23], DS[23]	VDDIO	I/O, HI-Z
21	PA22	EXTINT[6]						SERCOM3/PAD[0]	SERCOM5/PAD[0]	TC0/WO[0]	TCC0/WO[4]		GCLK/IO[6]	IN[6]		X[10], Y[26], DS[26]	VDDIO	I/O, HI-Z
22	PA23	EXTINT[7]						SERCOM3/PAD[1]	SERCOM5/PAD[1]	TC0/WO[1]	TCC0/WO[5]		GCLK/IO[7]	IN[7]		X[11], Y[27], DS[27]	VDDIO	I/O, HI-Z
23	PA24	EXTINT[12]						SERCOM3/PAD[2]	SERCOM5/PAD[2]	TC1/WO[0]	TCC1/WO[2]	CAN0/TX	CMP[2]	IN[8]			VDDIO	I/O, HI-Z
24	PA25	EXTINT[13]						SERCOM3/PAD[3]	SERCOM5/PAD[3]	TC1/WO[1]	TCC1/WO[3]	CAN0/RX	CMP[3]	OUT[2]			VDDIO	I/O, HI-Z
25	PA27	EXTINT[15]											GCLK/IO[0]				VDDIN	I/O, HI-Z
26	RESET																VDDIN	I, PU
27	PA28	EXTINT[8]											GCLK/IO[0]				VDDIN	I/O, HI-Z
28	GND
29	VDDCORE
30	VDDIN
31	PA30, SWCLK	EXTINT[10]							SERCOM1/PAD[2]	TCC1/WO[0]		SWCLK	GCLK/IO[0]	IN[3]			VDDIN	SWCLK, I
32	PA31, SWDIO	EXTINT[11]							SERCOM1/PAD[3]	TCC1/WO[1]				OUT[1]			VDDIN	I/O, HI-Z
Note: CAN is only available on PIC32CMxxxxJH01, and is absent on PIC32CMxxxxJH00. All analog pin functions are on the peripheral function B. The peripheral function B must be selected to disable the digital control of the pin. I²C is not supported on all SERCOM pins. Refer to “SERCOM I2C Pinout table” for the list of supported features for each peripheral instance. The following High-Sink pins have different properties than the regular pins: PA10, PA11. For the 32 pins variant, AVDD power supply pin 9 is internally connected to VDDIO.